Modified chip attach process and apparatus

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Solder wettable contact – lead – or bond

Reexamination Certificate

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Details

C257S678000, C257S704000, C257S793000, C257SE21499, C257SE21503, C257SE21508, C257SE21511

Reexamination Certificate

active

11167509

ABSTRACT:
A method of packaging a die includes reflowing the solder to electrically connect the die to a substrate at a first temperature, cooling the die and substrate to a second temperature, and placing a heated epoxy in contact with the die and the substrate. The method also includes holding the die and substrate at the second temperature for a time sufficient to allow the epoxy to cure, and cooling the die, substrate and epoxy. The second temperature is less than the first temperature. In addition, the die and substrate are not cooled to a temperature significantly below the second temperature until after the heated epoxy is placed in contact with the die and substrate.

REFERENCES:
patent: 4771929 (1988-09-01), Bahr et al.
patent: 6228678 (2001-05-01), Gilleo et al.
patent: 6228681 (2001-05-01), Gilleo et al.
patent: 6258627 (2001-07-01), Benenati et al.
patent: 6333209 (2001-12-01), Coico et al.
patent: 6919224 (2005-07-01), Sane et al.
patent: 2005/0070044 (2005-03-01), Sane et al.

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