Modification of array access checking in AIX

Details Modification of array access checking in AIX Modification of array access checking in AIX

2004-04-26

2008-11-04

Dam, Tuan Q. (Department: 2192)

Data processing: software development, installation, and managem

Software program development tool

Translation of code

C717S141000, C717S153000

Reexamination Certificate

active

07448029

ABSTRACT:
An error handling operation for checking of an array access in program code is modified during compilation thereof. A sequentially arranged null checking operation and array bounds checking operation for the array access are located. The array bounds checking operation has a corresponding error handling operation operable for setting an array bounds error. The located sequentially arranged null checking operation is removed. The corresponding error handling operation for the located sequentially arranged array bounds checking operation is modified to perform the removed null checking operation during execution of the program code.

REFERENCES:
patent: 6185673 (2001-02-01), Dewan
patent: 6343375 (2002-01-01), Gupta et al.
patent: 6412107 (2002-06-01), Cyran et al.
patent: 6519765 (2003-02-01), Kawahito et al.
patent: 6542990 (2003-04-01), Tremblay et al.
patent: 2003/0023958 (2003-01-01), Patel et al.
patent: 2003/0135788 (2003-07-01), Prakash
Midkiff et al., optimizaing array reference checking in Java programs, IBM systems Journal, vol. 37, No. 3, 1998, pp. 1-33.
Ishizaki et al., Eliminating Exception constrains of Java Programs for IA-64, Access Foundation and Morgan Kaufmann Publisher, 2003, pp. 1022.
Kawahito et al., Effective Null Pointer Check Elimination Utilizing Hardware Trap, ACM 2000, pp. 139-149.
Suganuma et al., Overview of the IBM Java Just-in-Time compiler, IMB System Journal vol. 39, No. 1, 2000, pp. 175-193.
Kawahito et al., Desgin, Implementation, and Evaluation of Optimizations in a Just-In-Time Compiler, ACM 1999, pp. 119-128.
Motohiro Kawahito, Hideaki komatsu, “Effective Null Pointer Check Elimination”, RD N435 07-2000 Article 160 p. 1299.
Wei-Ngan Chin, Siau-Cheng Khoo, “Deriving Pre-Conditions for Array Bound Check Elimination”, Programs as Data Objects, 2001., May 21-23, 2001, vol. 2053, p. 2-24.
Gupta, R. “A Fresh Look at Optimizing Array Bound Checking”, ACM SIGPLAN' 90, Jun. 20-22, 1990, vol. 25, No. 6, p. 272-282.

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