Modem clock with automatic gain control

Pulse or digital communications – Repeaters – Testing

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Details

375106, 375111, 375118, 328 63, H04L 2708, H04L 706

Patent

active

047471140

ABSTRACT:
A modem receiver having a timing recovery circuit is disclosed. The timing recovery circuit includes circuitry for extracting timing information, multiplication circuitry responsive to the timing information for providing a clock envelope signal and processing circuitry for controlling the gain of the clock envelope signal as a function of the average power of the clock envelope signal.

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patent: 3921075 (1975-11-01), Denny
patent: 3993952 (1976-11-01), Roza
patent: 4344176 (1982-08-01), Qureshi
Floyd M. Gardner, Phaselock Techniques, First Edition, 1966, pp. 55-58, 90-100.
D. L. Lyon, "Envelope Derived Timing Recovery in QAM and SQAM Systems," IEEE Transactions on Communications, vol. 23, No. 11, Nov. 1975, pp. 1327-1331.
D. L. Lyon, "Timing Recovery in Synchronous Equalized Data Communication," IEEE Transactions on Communications, vol. 23, No. 2, Feb. 1975, pp. 269-274.

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