Model-based feed-forward linearization of amplifiers

Amplifiers – Hum or noise or distortion bucking introduced into signal...

Reexamination Certificate

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Details

C330S151000

Reexamination Certificate

active

06765440

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to signal processing, and, in particular, to techniques for linearizing amplifiers used in communications systems using feed-forward compensation.
BACKGROUND OF THE INVENTION
Amplifiers, such as high-power amplifiers used in the base stations of wireless communication systems, typically exhibit non-linearity over their operating ranges. This non-linearity can result in noise that can corrupt or otherwise interfere with the communications. To address this problem, additional circuitry may be added to an amplifier in an attempt to linearize the effective amplifier response. Conventional techniques for linearizing amplifiers typically involve pre-compensation and/or feed-forward compensation.
In amplifier linearization based on pre-compensation, the input signal that is to be amplified is pre-distorted prior to being applied to the amplifier in order to adjust the input signal based on known non-linearities in the amplifier transfer function. The pre-distortion module is typically controlled using a feed-back signal based on the output signal generated by the amplifier. In feed-forward compensation, an auxiliary signal is fed forward and combined with the output of the amplifier to adjust the output signal for non-linearities in the amplifier transfer function.
FIG. 1
shows a high-level block diagram of a linearized amplifier circuit
100
according to the prior art. Amplifier circuit
100
utilizes both pre-compensation and feed-forward compensation to linearize the response of a high-power amplifier (HPA)
104
. Amplifier circuit
100
has a main signal processing channel and an auxiliary signal processing channel. The main channel includes pre-distorter
102
, HPA
104
, and high-power delay module
106
, while the auxiliary channel includes delay module
110
, summation node
114
, and low-power amplifier (LPA)
116
. In addition, amplifier circuit
100
includes summation node
108
.
The input signal is applied to both pre-distorter
102
and delay module
110
. Pre-distorter
102
pre-distorts (i.e., pre-compensates) the input signal prior to being applied to HPA
104
. The output from HPA
104
is applied to high-power delay module
106
and coupled off at node
112
. Summation node
114
subtracts the delayed input signal of delay module
110
from the attenuated amplifier signal from node
112
to generate the input to LPA
116
. Summation node
108
subtracts the output of LPA
116
from the delayed output of HPA
104
to generate the linearized output signal.
Although not shown in
FIG. 1
, amplifier circuit
100
would also typically have a third (“feed-back control”) channel in which control signals are generated based on output signals from one or more of the various components (e.g., pre-distorter
102
, HPA
104
, summation node
114
, and/or LPA
116
) and used to control the operations of different components, such as pre-distorter
102
and/or LPA
116
.
The purpose of delay modules
106
and
110
is to ensure synchronization between the pairs of signals combined at summation nodes
108
and
114
, respectively. In particular, delay module
110
delays the input signal to account for the processing time of pre-distorter
102
and HPA
104
, while high-power delay module
106
delays the high-power output of HPA
104
to account for the processing time of summation node
114
and LPA
116
. These delays become more and more undesirable as the speed of data communications increases.


REFERENCES:
patent: 5963091 (1999-10-01), Chen et al.
patent: 6154093 (2000-11-01), Chen et al.
patent: 6166601 (2000-12-01), Shalom et al.
patent: 6166603 (2000-12-01), Smith
patent: 6172565 (2001-01-01), Chen et al.
patent: 6236267 (2001-05-01), Anzil
patent: 6281747 (2001-08-01), Ahuja et al.
patent: 6288610 (2001-09-01), Miyashita
patent: 6366177 (2002-04-01), McCune et al.
patent: 6417731 (2002-07-01), Funada et al.
patent: 2002/0012404 (2002-01-01), Ahn
patent: 2002/0047746 (2002-04-01), Dartois
patent: 2002/0089374 (2002-07-01), McRory
patent: 2002/0105379 (2002-08-01), Nakayama et al.
patent: 2003/0184373 (2003-10-01), Cameron et al.
patent: 05121957 (1993-05-01), None
Provisional Application # 60/356,872.

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