Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle
Reexamination Certificate
2011-08-30
2011-08-30
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
C716S053000, C716S054000, C716S055000
Reexamination Certificate
active
08010913
ABSTRACT:
Some embodiments provide techniques and systems to identify locations in a target mask layout for placing assist features. During operation, an embodiment can determine a spatial sampling frequency to sample the target mask layout, wherein sampling the target mask layout at the spatial sampling frequency prevents spatial aliasing in a gradient of a cost function which is used for computing an inverse mask field. Next, the system can generate a grayscale image by sampling the target mask layout at the spatial sampling frequency. The system can then compute the inverse mask field by iteratively modifying the grayscale image. The system can use the gradient of the cost function to guide the iterative modification process. Next, the system can filter the inverse mask field using a morphological operator, and use the filtered inverse mask field to identify assist feature locations in the target mask layout.
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Barnes Levi D.
Painter Benjamin D.
Poonawala Amyn A.
Lee Eric
Park Vaughan Fleming & Dowler LLP
Sahasrabuddhe Laxman
Siek Vuthe
Synopsys Inc.
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