Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
1999-12-17
2002-06-18
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185110, C711S105000, C711S168000
Reexamination Certificate
active
06407949
ABSTRACT:
I. FIELD OF THE INVENTION
The invention generally relates to mobile communication devices such as cellular telephones and in particular to flash memory and static random access memory (SRAM) for use therein.
II. DESCRIPTION OF THE RELATED ART
A flash memory is a type of non-volatile memory that retains stored information even after power is disconnected. This is in contrast with volatile memory devices, such as SRAM or dynamic RAM (DRAM), which lose data stored therein once power has been disconnected. In addition to being non-volatile, flash memory is electrically erasable and reprogrammable within the system in which it is incorporated. This is in contrast with other non-volatile memory devices, such as erasable, programmable read-only memory (EPROM) which typically requires special voltages for reprogramming and, hence, is typically only reprogrammable by a manufacturer or service specialist.
Accordingly, flash memory is advantageously employed within devices requiring non-volatile memory that can be selectively erased and reprogrammed. In particular, flash memory is well-suited for use in desktop personal computers, laptop computers, video game cartridges, digital voice recorders, personal digital assistants (PDAs), and cellular telephones (or other mobile stations of wireless communication systems). Typically, within such systems, the flash memory is configured as a single flash macro, which can either be written to or read from, but not both, at any given time. For most devices this is sufficient. For example, within most devices containing flash memory, any data to be stored within the flash memory is stored within volatile memory until the device is to be shut off, then the flash memory is reprogrammed with the data during a shut-down operation. As such, it is unlikely that the device will ever need to both read from and write to the flash memory at the same time. As one example, a PC or laptop computer may store changes to a basic input/output system (BIOS) within a DRAM memory until the computer is to be shut down, then the changes to the BIOS are transferred to flash memory.
Problems, however, arise when attempting to implement flash memory within a cellular telephone which may require many more frequent read operations and write operations to the flash memory. Cellular telephones consume a considerable amount of power during use and, to be commercially desirable, the cellular telephone must be able to operate effectively for long periods of time between recharging. As a result, cellular telephones are typically configured to shut down power to internal components as often as possible. Within CDMA cellular telephones, for example, many components are powered down between each successive paging slot of the CDMA system. (The paging slots occur 30 milliseconds apart.) Accordingly, it is not feasible to accumulate pending write operations within a non-volatile memory until a single final power shut-down operation. Rather, data to be written to the flash memory may need to be written promptly prior to each successive temporary power shut-down. Moreover, the need to frequently reprogram the flash memory is typically much greater within a cellular telephone, particularly within a cellular smart phone, i.e., a cellular telephone configured with a PDA to thereby provide both cellular telephony functions and PDA functions. Insofar as computers are concerned, a flash memory may only need to be reprogrammed in the event there are changes to the BIOS or other configuration parameters of the system. With a cellular smart phone, the flash memory may need to be frequently reprogrammed to record new telephone numbers, addresses, calendar dates, meeting dates and the like. For smart phones configured to record voice memos, the flash memory may need to be reprogrammed whenever the uses of the telephone records a voice memo. Accordingly, reading and writing operations may need to be performed much more frequently in connection with cellular telephones and the conventional flash memory arrangement, whereby reading from and writing to the flash memory cannot be performed simultaneously, may be inadequate.
Moreover, within cellular telephone applications, the flash memory may need to be accessed much more quickly than is required in other applications. This is particularly true if the data to be retrieved from the flash memory is required for use in connection with any real time functions of the cellular telephone, such as voice telephone calls. For such functions, any delay necessitated by having to wait for a previous write operation to be completed before reading from the flash memory may be significant.
Furthermore, even if a read operation need not be delayed pending completion of a write operation, read times within conventional flash memories can be fairly slow. Flash memories become degraded with use such that the read time for particular flash cells that have been frequently rewritten become slow in comparison with flash cells that have not been frequently rewritten. Hence, after a device containing flash memory has been used for some time, some of the flash cells have slower read times than others. To account for possible degradation, devices containing flash cells typically set an internal flash memory read time to be relatively slow. In this regard, a bus system connected to the flash memory for retrieving data from the flash memory is pre-programmed with a number of wait states sufficient to account for the potentially slow access times of cells that may become degraded. In other words, the bus system is pre-programmed to accommodate the worst case scenario insofar as flash memory access time is concerned. As a result, all read accesses are relatively slow, even from flash memory locations which have not yet been degraded. In many devices, the slow read time is not problematic. However, in connection in with cellular telephones, it is much more important to minimize the time required for each access from flash memory, particularly while the cellular telephone is engaged in real time functions. Accordingly, it would be highly desirable to provide an improve flash memory system, particularly for use within cellular telephones or similar devices which overcome the disadvantages set forth above. It is to this end that aspects of the present invention are directed.
Typically, within cellular telephones, a flash memory is used in conjunction with an SRAM, wherein the flash memory provides for non-volatile storage and the SRAM provides for volatile storage. Typically, the flash memory and SRAM devices are separate devices from one another and are also mounted separately from a primary ASIC of the cellular telephone which includes the microprocessor and the various peripheral components for handling cellular telephony functions. In such implementations, because of the flash and the SRAM memories are separate from the ASIC, the time required to access the flash memory and the SRAM can be relatively slow, thus, hindering overall system performance. Accordingly, it is also desirable to provide an improved system architecture for use within cellular telephones having flash memory, SRAM and a central ASIC which permits expedited access to the flash and SRAM memories and it is to this end that other aspects of the invention are directed.
Also, because the flash memory of the cellular telephone may need to be accessed frequently, there is a risk that portions of data stored within the flash memory may be inadvertently overwritten. This is particularly true in state-of-the-art cellular telephones which may include the numerous hardware components each capable of reprogramming portions of the flash memory. This problem is exacerbated by the fact that a software for use within cellular telephones typically must be developed and brought to market very quickly to accommodate the fast-changing marketplace. As a result, there is a fairly significant risk that software may inadvertently cause portions of data within the flash memory to be re-written or erased. This can be a serious problem if the
Elhusseini Jalal
Jha Sanjay
Khan Safi
Simmonds Stephen
Yu Nicholas K.
Brown Charles D.
Qualcomm Incorporated
Seo Howard H.
Wadsworth Philip R.
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