Telecommunications – Transmitter and receiver at same station – With tuning
Reexamination Certificate
2000-11-14
2004-11-30
Craver, Charles (Department: 2682)
Telecommunications
Transmitter and receiver at same station
With tuning
C455S084000, C455S141000, C455S209000
Reexamination Certificate
active
06826388
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a mobile communication apparatus which can be implemented with a less number of components, and more particularly, to a transceiver which employs a direct conversion scheme suitable for larger scale of integration.
2. Description of the Related Art
With explosive popularization of mobile communication apparatus, requirements for a reduction in size and cost have been increased. For this reason, it is desired to eliminate VCO (voltage controlled oscillator), reduce the number of filters, and apply integrated circuits with a higher degree of integration. A prior art example of a transceiver which meets such requirements is described in K. Takikawa et. al., “RF Circuits Technique of Dual-Band Transceiver IC for GSM and DCS1800 applications,” IEEE 25th European Solid-State Circuits Conference Preprints pp. 278-281, 1999. The configuration of this transceiver is illustrated in FIG.
10
A. The illustrated transceiver comprises an integrated circuit
1016
, and other components
1001
-
1015
which are connected external to the integrated circuit
1016
. The prior art example supports two frequency bands, i.e., 900 MHz band and 1.8 GHz band. Also, the transceiver employs a superheterodyne scheme for a receiver and an offset PLL scheme for a transmitter. The superheterodyne receiver requires two RF (high frequency) filters
1001
,
1002
for suppressing out-of-band blocker signals; two image rejection filters
1003
,
1004
for rejecting blocker signals in an image frequency band associated with mixing; and an IF (intermediate frequency) filter
1005
for filtering out blocker signals near a reception channel. The receiver also requires two local oscillators
1006
,
1007
for supporting the two frequency bands, i.e., 900 MHz band and 1.8 GHz band.
A reception scheme which can reduce the number of externally connected components is a direct conversion scheme. A prior art example of a direct conversion receiver is described in Behzad Razavi, “A 900-MHz CMOS Direct Conversion Receiver,” IEEE Symposium on VLSI Circuits, pp. 113-114, 1997. The configuration of this receiver is illustrated in FIG.
10
B. Since no image response exists in principle, the direct conversion scheme does not require an image rejection filter. Also, an IF filter is eliminated since it can be replaced by a filter integrated in an IC. In this prior art example, a VCO
1025
oscillates at a frequency twice an input frequency of the receiver which is in a range of 1850-1920 MHz. When this receiver is applied to GSM, DCS1800 dual band receiver, the VCO
1025
must oscillate in a range of 1850 to 1920 MHz (for GSM) and in a range of 3610 to 3760 MHz (for DCS1800). However, since it is difficult for a single VCO to cover these frequency bands, two VCOs are required.
A widely known drawback of the direct conversion receiver is a DC offset voltage. This is generated because an input signal to mixers
1019
,
1020
is equal to a locally oscillated signal in frequency. For example, if the locally oscillated signal leaks into an input terminal for an input signal, locally oscillated signals are mutually multiplied to generate DC offset voltage. A prior art example of a scheme for canceling the DC offset voltage is described in Asad A. Abidi et. al,. “Direct-Conversion Radio Transceivers for Digital Communications,” IEEE Journal of Solid-State Circuits, pp. 1399-1410, vol. 30, no. 12. December 1995. The configuration of this transceiver is illustrated in FIG.
11
. An output DC offset voltage of a variable gain amplifier composed of variable gain amplifiers
1101
,
1103
,
1105
and low pass filters
1102
,
1104
is detected by a digital signal processor (DSP)
1106
. The DSP
1106
outputs a DC offset voltage cancel signal to an input of the variable gain amplifier
1101
based on the detected information.
SUMMARY OF THE INVENTION
As described above, in the direct conversion receiver, the number of externally connected filters can be reduced. However, if the direct conversion receiver is used in place of the superheterodyne receiver in the GSM, DCS1800 dual band transceiver of
FIG. 10A
, the number of local oscillators is increased. This is because the transmitter requires a locally oscillated frequency in a range of 1150 to 1185 MHz (for GSM) and in a range of 1575 to 1650 MHz (for DCS1800), and the receiver requires a locally oscillated frequency in a range of 1850 to 1920 MHz (for GSM) and in a range of 3610 to 3760 MHz (for DCS1800), but a single VCO encounters difficulties in covering a plurality of bands. For a further reduction in cost, a reduction in the number of VCOs is a primary subject.
Also, in GPRS (General Packet Radio Service) which implements high speed data communications based on a GSM system, a plurality of slots are assigned to reception and transmission. Thus, fast DC offset voltage cancellation is required. In addition, the DC offset voltage cancellation must be performed every operation frame. First, the necessity for the fast offset cancellation is explained with reference to FIG.
4
. One frame of GSM is comprised of eight slots, each of which has a duration of 577 &mgr;m. Assume herein a severe condition for the DC offset voltage cancellation, in which four slots are assigned to the reception (RX), and one slot is assigned to the transmission (TX). While a transmission slot TX
1
′ is assigned to a slot
7
, the transmission slot TX
1
′ is transmitted at a timing of TX
1
, which is 237 &mgr;sec before the slot
7
, in consideration of a propagation delay to a base station. Also, a monitoring period of approximately 500 &mgr;sec and a PLL synchronizing period are required other than transmission and reception. Assuming that the PLL synchronizing period lasts approximately 150 &mgr;sec, a time available for canceling the DC offset voltage, in which a transceiver does not operate, is calculated as 1154−500−237−150*2=117 &mgr;sec, thus requiring fast DC offset cancellation.
Next, the necessity for the offset cancellation performed every frame is explained with reference to
FIGS. 5A-5B
.
FIGS. 5A-5B
show a measuring circuit for measuring a received frequency dependency of an output DC offset voltage of a mixer, and the result of a measurement made thereby. The result of the measurement reveals that the output DC offset voltage has the frequency dependency. Therefore, in a system such as GSM, DCS1800, in which a received frequency is not fixed during a call but the frequency hops within a reception band, it is difficult to previously anticipate the DC offset voltage. Therefore, the DC offset voltage must be canceled every operation frame.
The scheme employed in the example of
FIG. 11
is not suitable for high speed data communications since a filter intervening in a feedback loop for offset cancellation make the fast offset cancellation difficult. Therefore, the realization of a fast offset canceling scheme suitable for high speed data communications is a second subject.
To realize the first subject, in the present invention, a receiver and a transmitter are supplied with locally oscillated signals in an RF band from a single VCO utilizing dividers. Dividers each having a fixed division ratio are used for generating the locally oscillated signals for the receiver, while a divider having a switchable division ratio is used for generating the locally oscillated signal for the transmitter.
To realize the second subject, in the present invention, a variable gain amplifier for baseband signal is provided with a DC offset voltage detector and a DC offset canceling circuit to accomplish fast cancellation of a DC offset by eliminating intervention of a filter within a feedback loop for offset cancellation.
REFERENCES:
patent: 4731796 (1988-03-01), Masterton et al.
patent: 5617060 (1997-04-01), Wilson et al.
patent: 5867777 (1999-02-01), Yamaji et al.
patent: 6006079 (1999-12-01), Jaffee et al.
patent: 6298226 (2001-10-01), Lloyd et al.
patent: 6317064 (2001-11-01), Ferrer
Hongo Toyohiko
Hotta Masao
Kasahara Masumi
Takikawa Kumiko
Tanaka Satoshi
Craver Charles
Mattingly Stanger & Malur, P.C.
Renesas Technology Corp.
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