Telecommunications – Receiver or analog modulated signal frequency converter – Frequency modifying or conversion
Reexamination Certificate
2001-03-13
2004-09-28
Tran, Pablo N. (Department: 2635)
Telecommunications
Receiver or analog modulated signal frequency converter
Frequency modifying or conversion
C455S313000, C455S326000, C455S333000, C327S113000, C327S359000
Reexamination Certificate
active
06799029
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 89120915, filed Oct. 6, 2000.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a mixer of a communication system. More particularly, this invention relates to a mixer with the functions of increasing conversion gain, reducing noise figure and enhancing linearity.
2. Description of the Related Art
FIG. 1
is a block diagram showing a receiving part of a conventional communication system. A radio frequency signal is received by an antenna
10
and sent to a low noise amplifier
12
. Being amplified by the low noise amplifier
12
, a radio frequency P
i
is output to a mixer
14
. If the radio frequency signal P
i
has a frequency of 1800 kHz, a high frequency signal of 1810 kHz is fed into the mixer
14
from a local oscillator
16
.
After receiving the radio frequency P
i
and the high frequency signal, the mixer
14
outputs an output signal P
0
to an intermediate frequency filter
18
. The high frequency signal is filtered by the intermediate frequency filter
18
, and an intermediate frequency signal is output to a sub-ordinary circuit (not shown). The frequency of the intermediate frequency signal is about 10 kHz.
FIG. 2
shows a circuit diagram of a Gilbert multiplier. In
FIG. 2
, a Gilbert multiplier
20
is used as a mixer. Three differential amplifiers are assembled by an NMOS M
1
22
and an NMOS M
2
24
, an NMOS M
3
26
and an NMOS M
4
28
, and an NMOS M
7
30
and an NMOS
32
, respectively. The NMOS M
7
34
is used as a current source.
In
FIG. 2
, the Gilbert multiplier used as a mixer circuit
20
has an output power signal P
0
as:
P
0
=P
LO
×P
i
P
LO
=A
2
sin &ohgr;
LO
t
P
i
=A
1
sin &ohgr;
i
t
P
0
=
A
1
A
2
sin
ω
i
t
·
sin
ω
LO
t
=
1
/
2
A
1
A
2
[
cos
(
ω
LO
-
ω
i
)
t
-
cos
(
ω
LO
-
ω
i
)
t
wherein, P
i
is the input power signal input from an RF input terminal to the mixer circuit
20
, and P
LO
is the input power signal input from the LO input terminal to the mixer circuit
20
. A
1
is the amplitude of the input power signal P
i
, and A
2
is the amplitude of the input power signal P
LO
. &ohgr;
l
is the frequency of the input power signal P
i
, and &ohgr;
LO
is the frequency of the input power signal P
LO
. &ohgr;
i
+&ohgr;
LO
is a high frequency signal, and &ohgr;
i
−&ohgr;
LO
an intermediate frequency signal. Through the intermediate frequency filter, the intermediate frequency signal &ohgr;
i
−&ohgr;
LO
can be obtained from the high frequency signal &ohgr;
i
+&ohgr;
LO
.
The characteristics of the mixer can be described by the following parameters:
(1) The conversion gain C. G.=P
0
/P
I
;
(2) The noise figure NF=(S
0
/N
0
)/(S
i
/N
i
); and
(3) The linearity as shown as the curve of the mixer in FIG.
3
. When an actual curve is different from the ideal curve with 1 dB, the relationship between the input power and output power is judged to determine the degree of the linearity of the mixer.
In a mobile communication system, a large conversion gain and a small noise figure of the mixer can be obtain by increase the output power of the local oscillator input to the mixer. However, to increase the output power of the local oscillator increase the power consumption of the mobile communication system to reduce the lifetime of the battery of the mobile communication system. If the output power of the local oscillator is decreased, the linearity of the mixer is decreased.
SUMMARY OF THE INVENTION
The invention provides a mixer of a communication system to reduce the output power of the local oscillator, extend the lifetime or operation time of the battery, suppress the distortion of harmonic wave of the local oscillator, and to reduce the noise figure and enhance the linearity of the mixer.
A mixer of a communication system comprising an antenna, a low noise amplifier, a mixer, a local oscillator and an intermediate frequency filter is provided in the invention. The mixer comprises a mixer circuit to perform a multiplication on a radio frequency received from the antenna and a radio frequency generated from the local oscillator. A gain amplified circuit is coupled a power supply terminal of the mixer circuit to increase the linearity of the mixer circuit. An voltage auto-tracking circuit is coupled to an output terminal of the gain amplified circuit to control the direct voltage output from output terminal of the gain amplified circuit. A direct current voltage generating circuit is coupled to the input terminal of the local oscillator of the mixer circuit to generate a fix threshold voltage.
The voltage auto-tracking circuit further comprises a resistor, a capacitor, an operation amplifier and an NMOS. The resistor has one terminal coupled to the output terminal of the gain amplified circuit. One terminal of the capacitor is coupled to ground, while the other terminal of the capacitor is coupled to the other terminal of the resistor. The positive terminal of the operation amplifier is coupled to the other terminal of resistor, and the negative terminal of the operation amplifier is coupled to a reference voltage. The NMOS has a drain coupled to a power source, a source coupled to output terminal of the gain amplified circuit, and a gate coupled to an output terminal of the operation amplifier. A base of the NMOS is coupled to the source of the NMOS. The NMOS is used to provide a direct current.
The gain amplified circuit comprises a first current mirror circuit, a second current mirror circuit and a third current mirror circuit. The first mirror circuit has an impedance with one terminal coupled to a power source and the other end coupled to a first power input terminal of the mixer circuit. The first mirror circuit comprises a direct source coupled to the power source. The first current mirror circuit provides a direct current to the mixer circuit. The second current mirror circuit comprises an impedance with one terminal coupled to the power source and the other terminal coupled to a second power input terminal of the mixer circuit. The second current mirror circuit provides a direct current to the mixer circuit. The third mirror circuit comprises an impedance with one terminal coupled to a current source of the first current mirror circuit and the other terminal coupled to ground. The third current mirror circuit comprises a current source with one terminal coupled to an output terminal of the gain amplified circuit, and the other end coupled to ground. The third current mirror circuit also provides a direct current.
In the direct current voltage generating circuit, a first PMOS has a source coupled to the power source, and a base coupled to its the drain. A first NMOS has a drain coupled to the drain of the first PMOS, a gate coupled to its own drain, and a base of the first NMOS coupled to its own source. A second NMOS has a drain coupled to the source of the first NMOS, a gate coupled to its own drain, and a base coupled its own source. A second PMOS has a source coupled to the power source, a gate coupled to the gate of the first PMOS, a drain coupled to its own gate, and a base coupled to its drain. A third NMOS has a drain coupled to the drain of the second PMOS, a gate coupled to the gate of the first NMOS, and a base coupled to its source. A fourth NMOS has a drain coupled to the source of the third NMOS, a gate coupled to the gate of the second PMOS, a source coupled to the source of the second NMOS, and a base coupled to its own source. A fifth NMOS has a gate coupled to a bias power source, a source coupled to ground, and a base coupled to its own source. A third PMOS has a source coupled to the power source, a gate coupled to the drain of the second PMOS, a drain coupled to the output terminal of the direct current voltage generating circuit, and a base coupled to its own drain. A sixth NMOS has a drai
J. C. Patents
Macronix International Co. Ltd.
Tran Pablo N.
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