Mixer noise reduction technique

Details Mixer noise reduction technique Mixer noise reduction technique

2000-10-17

2004-06-08

Tran, Sinh (Department: 2681)

Telecommunications

Receiver or analog modulated signal frequency converter

Noise or interference elimination

C455S323000, C455S326000, C455S330000, C455S333000, C327S355000, C330S253000, C330S254000

Reexamination Certificate

active

06748204

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to mixer circuits and, more particularly, to a noise reduction technique for mixer circuits.
Mixer circuits, also known as modulator circuits, find many applications in electronic systems. For example, mixer circuits are widely used in wireless communication devices such as pagers and cellular phones to receive or transmit a modulated Radio Frequency (RF) signal. The function of a mixer circuit is to combine signals of two different frequencies in such a way as to produce energy at other frequencies. This function is typically achieved by designing a circuit that receives two input signals and produces an output that is product of the two inputs. The product of two periodic input signals will result in a modulated output signal as is well known in the art.
FIG. 1
illustrates a contemporary mixer circuit
100
for combining an RF signal and a differential input signal. The mixer circuit
100
of
FIG. 1
includes a gain stage
110
and a bias circuit
120
. The gain stage
110
of mixer circuit
100
receives a differential input signal (V
in1
-V
in2
) and produces a differential output signal V
0
. The gain stage
110
includes a pair of NMOS transistors
101
and
102
with their sources coupled together at common node
105
. The gain stage
110
also includes a pair of load resistors
103
and
104
connected between the drains of transistors
101
and
102
and a supply voltage V
dd
respectively. Bias circuit
120
of mixer circuit
100
includes an NMOS transistor
121
having an input to receive a bias voltage V
bias
to produce a bias current I
bias
. Bias current I
bias
is coupled to the common node
105
to set the bias currents in transistors
101
and
102
.
Mixer circuit
100
of
FIG. 1
produces a modulated output by including an RF signal input to bias circuit
120
. Bias circuit
120
receives an RF signal V
RF
at the drain of transistor
121
. This signal has the effect of modulating the bias current I
bias
. As I
bias
is modulated, the bias currents in transistors
101
and
102
are modulated, thereby varying the gain of gain stage
110
by an amount proportional to the amplitude of the RF signal. Accordingly, the output of mixer circuit
100
is the product of the differential input voltage (V
in1
-V
in2
) and the RF signal V
RF
.
However, contemporary mixer circuits such as the one illustrated in
FIG. 1
are often required to perform signal processing in environments that are very sensitive to the introduction of noise. For example, in a receiver the input signal may be very small (e.g. 10 microvolts). Accordingly, the receiver signal path requires high sensitivity, which in turn demands low noise. Therefore, a mixer circuit in the receiver signal path must minimize the amount of noise introduced into the system. Additionally, transmitted signals may be distorted by noise in the transmission signal path, and therefore can be more difficult to receive at the other end of the transmission medium. Likewise, signals input to a receiver may already be heavily distorted, and the introduction of additional noise may reduce the fidelity of the information contained in the signal.
Accordingly, a mixer circuit that reduces the amount of noise introduced into the signal path during either the reception or transmission of a signal is desired.
SUMMARY OF THE INVENTION
A mixer, in accordance with one embodiment of the present invention, includes a gain stage for receiving a first signal and a bias current, and in accordance therewith, producing an output signal. The gain stage receives the bias current on a common node. The bias circuit includes an input for receiving a second signal and an output coupled to the common node for providing the bias current to the gain stage, the bias current comprising bias current frequency components. The mixer also includes a frequency dependent current shunt circuit coupled between the common node and a reference voltage.
According to one embodiment, a first portion of the bias current frequency components within a first frequency range are coupled to the reference voltage by the shunt circuit, and a second portion of the bias current frequency components within a second frequency range are coupled to the reference voltage by the shunt circuit, the first portion being larger than the second portion.
According to one embodiment the frequency dependent current shunt circuit comprises an inductor having a first terminal coupled to the common node and a second terminal coupled to the reference voltage.
According to one embodiment, the bias circuit comprises a transistor having a control input and a first and second output, wherein the control input is coupled to a bias voltage, the first output is coupled to a second reference voltage, and the second output is coupled to the common node.
According to one embodiment, the differential stage comprises a first transistor having a control input and first and second outputs. The control input of the first transistor is coupled to receive a first component of the differential signal. The differential stage also comprises a second transistor having a control input and first and second outputs, the control input coupled to receive a second component of the differential signal. Further, the differential stage comprises a load coupled to the first output of the first transistor and to the first output of the second transistor, wherein the second output of the first transistor and the second output of the second transistor are coupled together and to the common node.
According to one embodiment, the present invention includes a method of reducing noise in a mixer circuit. The method comprises receiving a first signal in a gain stage, receiving a second signal in a bias circuit, generating a bias current in response to the second signal, the bias current having bias current frequency components including a frequency component at the first frequency, shunting a first portion of the bias current frequency components within a first frequency range to a reference voltage and a second portion of the bias current frequency components within a second frequency range to the reference voltage, the first frequency being in the second frequency range and the first portion being larger than the second portion, and coupling the bias current to the gain stage to produce a mixer output.


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