Mixer circuits for second order intercept point calibration

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency modifying or conversion

Reexamination Certificate

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Details

C455S296000, C455S317000, C455S326000

Reexamination Certificate

active

08010074

ABSTRACT:
A balanced mixer circuit (300, 400, 500, 600, 700and800) in a baseband receiver (202) includes an oscillator circuit (212), a mixer (214and215), a digital-to-analog converter (258and259) and a digital signal processor (250). The mixer includes CMOS devices (301, 302, 303and304). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.

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