Telecommunications – Receiver or analog modulated signal frequency converter – Frequency modifying or conversion
Reexamination Certificate
2006-03-21
2006-03-21
Urban, Edward F. (Department: 2685)
Telecommunications
Receiver or analog modulated signal frequency converter
Frequency modifying or conversion
C455S252100, C455S333000, C327S214000, C327S272000, C327S437000, C330S299000
Reexamination Certificate
active
07016664
ABSTRACT:
A mixer circuit arrangement30comprises a complementary transconductor circuit31and a mixer stage32. The complementary transconductor circuit31includes two paths in parallel between a positive supply voltage VDD and ground G and is connected directly between the voltage supply terminals VDD and G. The first path includes a P-type MOS transistor TP1and an N-type MOS transistor TN1connected in series. Similarly, the second path includes a P-type MOS transistor TP2and an N-type MOS transistor TN2connected in series. The gate electrodes of the P-type transistors TP1and TP2are connected to a voltage bias Vbp via high value bias resistors Rb, and the gate electrodes of the N-type transistors TN1and TN2are connected to a second voltage bias Vbn via high value bias resistors Rb. The mixer stage32is connected between the output of the complementary transconductor circuit31and a load, the load also being connected to one of the supply terminals.
REFERENCES:
patent: 5768700 (1998-06-01), Kardontchik
patent: 5859566 (1999-01-01), Voorman et al.
patent: 5870670 (1999-02-01), Ripley et al.
patent: 6226509 (2001-05-01), Mole et al.
patent: 6631257 (2003-10-01), White et al.
patent: 694 21 692 T 2 (2000-07-01), None
patent: 0 684 698 (1995-11-01), None
patent: 2 331 193 (1999-05-01), None
patent: 0116475.5 (2001-08-01), None
A. N. Karanicolas “A 2.7-V 900-MHz CMOS LNA and Mixer” IEEE J. of Solid-State Circuits, vol. 31, pp. 1939-1944, Dec. 1996.
A. Rofouguran, G. Chang, J.J. Rael et al “A Single-Chip 900-MHz Spead-Spectrum Wireless Transceiver in 1-μm CMOS—Part II: Receiver Design” IEEE J. of Solid-State Circuits, vol. 33, pp 535-547, Apr. 1998.
F. Behbahani, J. C. Lette, Y. Kishigami et al A 2.4-GHz Low-IF Receiver for Wideband WLAN 0.6-μm CMOS—Architecture and Front-End. IEEE J. of Solid-State Circuits, vol. 35, pp. 1908-1916, Dec. 2000.
Karanicolas, A.N., A 2.7-V 900-MHz CMOS LNA and mixer, pp. 1939-1944, IEEE Journal of Solid-State Circuits, vol. 31, No. 12, Dec. 1996.
Dority & Manning P.A.
Nguyen Thuan T
Urban Edward F.
Zarlink Semiconductor Limited
LandOfFree
Mixer circuit arrangement and an image-reject mixer circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Mixer circuit arrangement and an image-reject mixer circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Mixer circuit arrangement and an image-reject mixer circuit... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3596297