Mixed technology integrated circuit comprising CMOS structures a

Details Mixed technology integrated circuit comprising CMOS structures a Mixed technology integrated circuit comprising CMOS structures a

1990-07-06

1992-01-14

Wojciechowiczs, Edward J.

357 34, 357 42, 357 48, 357 52, H01L 2702

Patent

active

050815172

ABSTRACT:
A high density, mixed technology integrated circuit comprises CMOS structures and bipolar lateral transistors, the electrical efficiency and Early voltage of which are maintained high by forming "well" regions through the collector area. The operation determines the formation of a "collector extension region" extending relatively deep within the epitaxial layer so as to intercept the emitter current and gather it to the collector, subtracting it from dispersion toward the substrate through the adjacent isolation junctions surrounding the region of the lateral bipolar transistor. Under comparable conditions, the ratio between IcIsubstrate is incremented from about 8 to about 300 and the Early voltage from about 20V to about 100V. The V.sub.CEO, BV.sub.CBO and BV.sub.CDES voltages are also advantageously increased by the presence of said "well" region formed in the collector zone.

REFERENCES:
patent: 4812891 (1989-03-01), Bingham

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