Mixed-modulo address generation using shadow segment registers

Details Mixed-modulo address generation using shadow segment registers Mixed-modulo address generation using shadow segment registers

1996-03-19

1998-08-04

Ngo, Chuong Dinh

Boots, shoes, and leggings

711200, G06F 738, G06F 926

Patent

active

057904430

ABSTRACT:
A mixed-modulo address generation unit has several inputs. The unit effectively adds together a subset of these inputs in a reduced modulus while simultaneously adding other inputs in a full modulus to the partial sum of reduced-modulus inputs. The subset of inputs receives reduced-width address components such as 16-bit address components which are effectively added together in modulo 64K. The other inputs receive full-width address components such as 32-bit components which are added in the full modulus, 4G. Reduced-width components are zero-extended to 32 bits before input to a standard 32-bit adder. A 16-bit carry generator also receives the reduced-width components and generates the carries out of the 16th bit position. When one or more carries is detected, a correction term is subtracted from the initial sum which is recirculated to the adder's input in a subsequent step. The correction term is the number of carries out of the 16th bit position multiplied by 64K. The full-width segment bases for all active segments are stored in the register file, but the most commonly accessed segments, the data and stack segments, have a copy of their segment bases also stored in a shadow register for input to the adder. Thus the number of read ports to the register file is reduced by the shadow segment register. Less-frequently-used segments require an additional step through the adder to generate the address, but addresses in the data and stack segments are generated in a single cycle.

REFERENCES:
patent: 4598266 (1986-07-01), Bernardson
patent: 4722067 (1988-01-01), Williams
patent: 4742479 (1988-05-01), Kloker et al.
patent: 4935867 (1990-06-01), Wang et al.
patent: 5249148 (1993-09-01), Catherwood et al.
patent: 5293592 (1994-03-01), Fu et al.
patent: 5335333 (1994-08-01), Hinton et al.
patent: 5381360 (1995-01-01), Shridhar et al.
patent: 5408626 (1995-04-01), Dixit

Affiliated with

Also associated with

Rating

Mixed-modulo address generation using shadow segment registers does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Mixed-modulo address generation using shadow segment registers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Mixed-modulo address generation using shadow segment registers will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1185184