Mixed mode output buffer circuit for CMOSIC

Details Mixed mode output buffer circuit for CMOSIC Mixed mode output buffer circuit for CMOSIC

1996-06-13

1997-02-18

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

327328, H03K 508

Patent

active

056044577

ABSTRACT:
This invention provides circuits which provide stable internally derived voltages for mixed mode large scale integrated circuits having SRAM, DRAM, and the like. The circuits use a summation of threshold voltages of metal oxide semiconductor field effect transistors to clamp voltages and a level detection circuit to compensate for variation in the primary supply voltage. A load detection and feedback circuit using a parasitic bipolar transistor provides voltage stability over a wide range of loading conditions.

REFERENCES:
patent: 5057715 (1991-10-01), Larsen et al.
patent: 5103115 (1992-04-01), Ueda et al.
patent: 5182468 (1993-01-01), Erdelyi et al.
patent: 5355033 (1994-10-01), Jang
patent: 5565811 (1996-10-01), Park et al.

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