Mismatch modeling tool

Details Mismatch modeling tool Mismatch modeling tool

2007-01-30

2007-01-30

Shah, Kamini (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C703S013000, C703S022000, C716S030000, C716S030000

Reexamination Certificate

active

09654253

ABSTRACT:
A mismatch modeling tool (10) comprises a software implemented mismatch model (32). The software implemented mismatch model (32) accesses: at least one editable mismatch model data library (18) comprising process parameter variables, and circuit simulation library and program (14) data output. An interface screen (100) provides input and output coupling between a user and the software implemented mismatch model (32).

REFERENCES:
patent: 5826269 (1998-10-01), Hussey
patent: 5867399 (1999-02-01), Rostoker et al.
patent: 6397117 (2002-05-01), Burrows et al.
patent: 6560755 (2003-05-01), Zhang et al.
Colin. C. McAndrew, “Practical Modeling for Circuit Simulation”, Mar. 1998, IEEE Jpurnal of Solid-State Circuits, vol. 33, No. 3, pp. 439-448.
Colin. C. Mcandrew, “Compact Device Modeling for Circuit Simulation”, 1997, IEEE Custom Intergrated Circuit Conference, p. 151-158.
Marcel J.M. Pelgrom, Hans P. Tuinhout and Maarten Vertregt, “Transistor matching in analog CMOS applications” Dec. 1998, IEDM 1998 Technical Digest International Dec. 6-9, 1998 p. 915-918.
Colin C. McAndrew, Patrick Drennan, William F. Davis and Richard Ida, “Automated Generation of SPICE Characterization Test Masks and Test Databases”, Proc. IEEE Int. Conf. On Microelectronics Test Structure vol. 12, Mar. 1999, pp. 74-79.
Teresa Serrano-Gotarredona and Bemabe Linares-Barranco, “A New Five-Parameter MOS Transistor Mismatch Model”, IEEE Electron device Letters, vol. 21, No. 1, Jan. 2000, pp. 37-39.
“E-mail at work” Special Report/Electronic Mail, IEEE Spectrum, Oct. 1992, pp. 24-28.
Four Pages Printed From Webopedia (date unknown) Discloses Common Meaning of “Frames”.
Michael et al., “Statistical Modeling of Device Mismatch for Analog MOS Integrated Circuits”, IEEE Journal of Solid-State Circuits, vol. 27, Issue 2, Feb. 1992, pp. 154-166.
P. Drennan, “Integrated Circuit Device Mismatch Modeling and Characterization for Alalog Circuits Design”—Ph.D. dissertation, Arizona State University, May 1999, 227 pages.
P. Drennan et al., “A Comprehensive MOSFET Mismatch Model”, IEEE ICMS, Mar. 1999.

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