Misfet circuit for reading the state of charge

Details Misfet circuit for reading the state of charge Misfet circuit for reading the state of charge

1974-10-16

1976-04-06

Hecker, Stuart N.

Communications: electrical

Digital comparator systems

307291, 340173FF, 340173CA, G11C 706, G11C 1124, G11C 1140

Patent

active

039493822

ABSTRACT:
In an MIS type semiconductor memory device which has at least two parasitic capacitors and which delivers, at its outputs, the state of charge accumulated in at least one of the parasitic capacitors, the respective parasitic capacitors are provided with inverter circuits. Each of the inverter circuits receives, as an input signal, the state of charge accumulated in the corresponding parasitic capacitor. When charges accumulated by precharging are to be discharged, each inverter forms a discharging path for the opposite parasitic capacitor.

REFERENCES:
patent: 3714638 (1973-01-01), Dingwall et al.
patent: 3774176 (1973-11-01), Stein et al.
patent: 3795898 (1974-03-01), Mehta et al.

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