MIS logical circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307214, 307215, H03K 1908, H03K 1920

Patent

active

040164306

ABSTRACT:
In a logical circuit comprising a load and a driving MISFET, a depletion type MISFET is connected between the load and the driving MISFET and a voltage which has a smaller absolute value than the absolute value of the difference between a supply voltage and a threshold voltage of the depletion type MISFET is impressed on the gate electrode of the depletion type MISFET.

REFERENCES:
patent: 3818245 (1974-06-01), Suzuki et al.
patent: 3944848 (1976-03-01), Heeren
Wyland, "FET Cascode Technique Optimizes Differential Amplifier Performance", Electronics, (pub.) pp. 81-84; 1/18/1971.

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