MIS-FETs isolated on common substrate

Details MIS-FETs isolated on common substrate MIS-FETs isolated on common substrate

1971-03-05

1977-03-29

Edlow, Martin H.

357 23, 357 52, H01L 2702

Patent

active

040152812

ABSTRACT:
An enhancement-type and a depletion-type metal-insulator-semiconductor field effect transistor are formed on a common substrate of silicon and are electrically isolated from each other by a plurality of layers including, for example, a first layer of SiO.sub.2, a second layer of Al.sub.2 O.sub.3 capable of inducing holes in the surface portion of the substrate, and a third layer of SiO.sub.2, and the relation between the thicknesses of these layers is suitably selected for attaining the satisfactory isolation between these transistors.

REFERENCES:
patent: 3456169 (1969-07-01), Klein
patent: 3475234 (1969-10-01), Kerwin
patent: 3502950 (1970-03-01), Nigh et al.
patent: 3550256 (1970-12-01), Deal
patent: 3560810 (1968-08-01), Balk
patent: 3580745 (1971-05-01), Kooi et al.
Gregor, I.B.M. Tech Discl. Bull., vol. 11, No. 2, July 1968, pp. 118-119.

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