Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2002-11-18
2004-05-04
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S066000, C327S562000, C327S108000, C330S257000, C323S315000
Reexamination Certificate
active
06731159
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of electronic circuits, and more specifically to current mirroring circuits that can operate at high frequencies.
2. Description of Related Art
Current mirroring circuits are transistor assemblies typically used in electronics and for realizing amplifiers. As is well known in the art, a mirroring circuit allows the duplication of a current existing in a first branch of a circuit, into a second, a third or an nth branch of the circuit.
FIG. 1
is a diagram showing the conventional architecture of a current mirroring circuit, including stray capacitances of the MOS transistors. A MOS-type transistor (with an N-type channel, for example) is assembled as a diode, in which flows a current I
ref
generated by a current source
4
. Two identical N channel transistors
2
and
3
have their source electrodes connected to ground and their gates connected to the gate of transistor
1
. As transistors
2
and
3
are identical and are subjected to the same control voltage V
gs
, the same current I
o
flows through transistors
2
and
3
. With regard to the respective physical characteristics of transistors
1
,
2
, and
3
,
FIG. 1
illustrates a transistor
1
having a channel length L and a channel width W
1
. Similarly, transistors
2
and
3
have a channel length L and a channel width W
2
.
It is known that the relationship between the current flowing inside the current source I
ref
and the current flowing in transistors
2
and
3
is given as:
I
o
/I
ref
=W
2
/
W
1
It is thus seen that duplicating currents between transistor
1
and both transistors
2
and
3
is realized according to a ratio that is defined by the channel widths of the transistors. Current duplication, and in particular the precision of this duplication, thus depends on the precision of the manufacturing process for obtaining precise physical dimensions.
In order to realize an adequate pairing of transistors
2
and
3
, transistors having high values of L and W (and thus having large physical dimensions) must be used. This results in stray capacitances of non-negligible values since the values are proportional to the area W
2
×L that the transistor covers on the silicon substrate.
FIG. 1
symbolically represents these stray capacitances that are connected between the various electrodes of the transistor. There is a capacitance between the gate and the source, the gate and the drain, and the drain and the source of each of transistors
2
and
3
.
The appearance of such stray capacitances is prejudicial to operation of the current mirror at high frequencies, which creates a dilemma. Either the size of the transistors, and consequently the values of the stray capacitances, are reduced, thus allowing for high frequency operation and less precise current duplication, or operation at high frequency is yielded and the area occupied by transistors is increased to ensure adequate current duplication.
Therefore, a need exists to overcome the problem of current mirroring circuit precision during high frequency operation.
SUMMARY OF THE INVENTION
In view of these drawbacks, it is an object of the present invention to overcome the above-mentioned drawbacks and to provide a current mirroring structure allowing for a high degree of accuracy in current duplication while allowing operation at high frequencies.
Another object of the present invention is to realize an amplifier structure that is usable at high frequency and equipped with a precise mirroring circuit.
One embodiment of the present invention provides a mirroring circuit including a first branch having a first transistor in series with a first resistor and a second branch having a second transistor in series with a second resistor. The mirroring circuit further includes a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor mounted as a diode, a source of the third transistor connected to a source of the first transistor and a drain and a gate of the third transistor connected to a first power source, which generates a first reference current. The servo circuit further includes a fourth transistor having its source connected to ground via a third resistor, its gate connected to the gate of the third transistor and its drain connected to a gate of the first transistor and to a second power source, which generates a second reference current. The servo circuit further includes a fifth transistor mounted as a diode, a source of the fifth transistor connected to a source of the second transistor and a drain and a gate of the fifth transistor connected to a third power source, which generates a third reference current. The servo circuit further includes a sixth transistor having its source connected to ground via the third resistor, its gate connected to the gate of the fifth transistor and its drain connected to a gate of the second transistor and to a fourth power source, which generates a fourth reference current.
Another embodiment of the present invention provides an amplifier circuit that includes a first differential stage, and a Miller gain stage having two outputs coupled to two outputs of the amplifier circuit. The Miller gain stage is supplied by a mirror current source that includes a first branch having a first transistor in series with a first resistor, a second branch having a second transistor in series with a second resistor, and a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor configured as a diode, a source of the third transistor being coupled to a source of the first transistor, and a drain and a gate of the third transistor being coupled to a first source generating a first reference current. The servo circuit also includes a fourth transistor having its source coupled to ground via at least a third resistor, its gate coupled to the gate of the third transistor, and its drain coupled to a gate of the first transistor and to a second source generating a second reference current. The servo circuit also includes a fifth transistor configured as a diode, a source of the fifth transistor being coupled to a source of the second transistor, and a drain and a gate of the fifth transistor being coupled to a third source generating a third reference current. The servo circuit also includes a sixth transistor having its source coupled to ground via at least the third resistor, its gate coupled to the gate of the fifth transistor, and its drain coupled to a gate of the second transistor and to a fourth source generating a fourth reference current.
Other objects, features and advantages of the present invention will become apparent from the following detailed description. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the present invention, are given by way of illustration only and various modifications may naturally be performed without deviating from the present invention.
REFERENCES:
patent: 5469092 (1995-11-01), Itakura
patent: 5497074 (1996-03-01), Boezen
patent: 5889431 (1999-03-01), Csanky
patent: 5969574 (1999-10-01), Legates
French Preliminary Search Report dated Aug. 29, 2002 for French Application No. 01 14926.
Ribas Raymond
Sabut Marc
Van Zanten Francois
Bongini Stephen
Callahan Timothy P.
Englund Terry L.
Gutman Bongini & Bianco P.L.
Jorgenson Lisa K.
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