Mirrored-gate cell for non-volatile memory

Details Mirrored-gate cell for non-volatile memory Mirrored-gate cell for non-volatile memory

2009-02-20

2011-11-08

Tran, Thien F (Department: 2895)

Active solid-state devices (e.g., transistors, solid-state diode

Bulk effect device

Bulk effect switching in amorphous material

C257S003000, C257S004000, C257S316000

Reexamination Certificate

active

08053749

ABSTRACT:
A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate.

REFERENCES:
patent: 2006/0091549 (2006-05-01), Kojima

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