Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression
Reexamination Certificate
2002-09-30
2004-11-09
Le, Dinh T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Unwanted signal suppression
Reexamination Certificate
active
06816004
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to communication systems, and more specifically to a method and apparatus for minimizing noise when data channels are implemented using on frequency division multiplexing.
2. Related Art
Communication systems are often implemented using frequency division multiplexing (FDM). FDM generally refers to an approach in which different signals are transmitted using different frequency bands on a shared medium. For example, customer premise equipment (CPEs) according ADSL standard use 30 kHz to 138 kHz band to transmit signals (“transmit-signals”) containing data (“transmit-information”) and 180 kHz to 1160 kHz to receive signals (“receive-signals”) containing some other data (“receive-information”). The 30-138 kHz band and 180-1160 kHz band respectively form the transmit channel and receive channel.
Noise is often introduced into receive-signals when generating and transmitting transmit-signals. The noise is generally formed by frequency components generated (while generating and transmitting the transmit-signals) for the receive channel. For example, when converting a digital value (e.g., bit) to a corresponding analog signal, the resulting quantization noise (covering the receive band) forms the noise.
Introduction of such noise into receive-signals is often undesirable. For example, it is generally desirable to generate transmit-signals with a high strength (to enable a distant receiver to receive signals of acceptable strength), and the receive signals are feeble (due to the attenuation caused while propagating from distant source). Due to the need to generate transmit-signals with high strength, the noise generated may also be correspondingly strong. The presence of strong noise components in the receive-signals may present challenges in accurately recovering any information (analog or digital) encoded in the (otherwise feeble) receive-signals.
Accordingly, it may be desirable to eliminate (or substantially reduce) the noise components generated associated with the transmit-signals. Such elimination may need to be performed while meeting several other requirements such as minimizing power consumption.
SUMMARY OF THE INVENTION
A filter circuit provided according to an aspect of the present invention contains a first stage implemented to operate as a second order filter with a high quality (Q) factor (greater than 2), and a second stage also implemented as second order filter but with a low Q factor (lower than 1.5) and an imaginary zero. Due to such a combination of features, unneeded frequency components may be effectively eliminated when implementing, for example, a modem in a DSL environment.
According to another aspect of the present invention, each of the first and second stages may be implemented using only a single operational amplifier, at least in situations when the first stage generates a differential output signal. By minimizing the number of operational amplifiers, the area (in an integrated circuit) and the power consumed may be minimized.
An embodiment of the first stage contains an operational amplifier and a feedback path. The operational amplifier may be coupled to receive an input signal on an inverting input, and generate an output signal. The feedback path couples a fraction of an inverted output signal to the inverting input terminal, thereby providing positive feedback. As the feedback path is coupled to the inverting input terminal, the non-inverting terminal can be used for operating the first stage in a differential mode without requiring additional operational amplifiers.
The first stage may further contain a first resistor and a second resistor coupled in series at a node. The first resistor receives the input signal and the second resistor is connected to the inverting terminal. The feedback path and a first capacitor is connected to the node and the first capacitor is connected between the node and ground. In an embodiment, the feedback path contains a third capacitor. The first stage may further contain a third resistor coupled between the node and the output terminal, and a second capacitor coupled between the output terminal and the inverting input terminal of the operational amplifier.
An embodiment of the second stage contains a second operational amplifier with an output terminal, an inverting input terminal and a non-inverting input terminal. The second stage also contains a first input terminal and a second input terminal and the second input terminal receives an inverted input signal in relation to the first input terminal. A fifth resistor and a fourth capacitor are connected in parallel, which are further connected between the first input terminal and the inverting input terminal of the second operational amplifier.
The second stage further contains a sixth resistor and a seventh resistor connected in series between the output terminal and the inverting input terminal of the second operational amplifier and the sixth resistor and the seventh resistor are connected at a third node. A fifth capacitor is connected between the second input terminal and the third node and a sixth capacitor is connected between the output terminal and the inverting input terminal.
The above configuration enables the first input terminal and the second input terminal to receive inverted signals without requiring additional inverters (or operational amplifiers with a gain of −1). When the first stage generates a differential output signal, the two terminals providing the differential output signal may respectively be connected to the first and second input terminals.
When the first stage generates a single ended output signal, an additional inverter may be used in the first stage to generate the inverted input signal for the feedback path. Accordingly, the output signal and the inverted output signal may be provided to the first and second input terminals respectively. In such a situation, the non-inverting terminal of the operational amplifier in the first stage may be connected to ground. When the second stage generates a single ended output signal, the non-inverting terminal of the operational amplifier in the second stage may also be connected to ground.
Further features and advantages of the invention, as well as the structure and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.
REFERENCES:
patent: 4553103 (1985-11-01), Rollett
patent: 5617063 (1997-04-01), Chaplik
patent: 6201438 (2001-03-01), Nicollini et al.
patent: 6344773 (2002-02-01), Sevastopoulos et al.
Chaplik Naom
Easwaran Prakash
Oswal Sandeep
Brady III Wade James
Le Dinh T.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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