Minimizing adverse effects of skew between two...

Details Minimizing adverse effects of skew between two... Minimizing adverse effects of skew between two...

2009-02-19

2010-10-05

Nguyen, Khai M (Department: 2819)

Coded data generation or conversion

Converter compensation

C341S155000

Reexamination Certificate

active

07808408

ABSTRACT:
Skew between a first clock signal received by a first analog-to-digital converter (ADC) and a second clock signal received by a second ADC is adjusted to minimize error. Each ADC has an ADC element that produces a respective first or second digital output signal in response to an analog input signal and a respective first or second clock signal. A correction signal is produced in response to the first and second digital output signals. The skew between the first and second clock signals is then adjusted in response to the correction signal.

REFERENCES:
patent: 6452518 (2002-09-01), Kawabata
patent: 6836227 (2004-12-01), Asami
patent: 7084793 (2006-08-01), Elbornsson
patent: 7283074 (2007-10-01), Sheng et al.
patent: 7675441 (2010-03-01), Sheng et al.

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