Minimized oversampling Manchester decoder

Details Minimized oversampling Manchester decoder Minimized oversampling Manchester decoder

1993-04-28

1996-02-13

Chin, Stephen

Pulse or digital communications

Receivers

Angle modulation

375278, 332103, 329304, H03D 300, H04L 2722

Patent

active

054917131

ABSTRACT:
A Manchester decoder and clock recovery circuit for recovering Manchester encoded data and a clock synchronized with the incoming data. The circuit uses an oversampling rate of eight times the data rate, and a reduction in circuit elements to reduce the circuit power consumption requirements. The circuit operates in a search mode and in a tracking mode. A clock phase generator produces eight phase clocks, used by a sampling and majority vote circuit to determine the decoded data value. During the tracking mode, the phase of the synchronized clock can be adjusted during data reception.

REFERENCES:
patent: 4361895 (1982-11-01), Khoudari
patent: 4881059 (1989-11-01), Saltzberg
patent: 4912730 (1990-03-01), Erhart
"Z85230/Z80230 ESCC Enhanced Serial Communication Controller," Technical Manual, Zilog, DPLL Digital Phase-Locked Loop, pp. 3-6 through 3-9.

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