Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2003-04-04
2004-02-17
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S253000, C438S254000, C438S397000, C257S306000, C257S303000
Reexamination Certificate
active
06693017
ABSTRACT:
TECHNICAL FIELD
Embodiments of the present invention relate generally to the fabrication of semiconductor devices, and more particularly a method of manufacturing a metal-insulator-metal (MIM) capacitor and structure thereof.
BACKGROUND
Capacitors are used extensively in electronic devices for storing an electric charge. Capacitors essentially comprise two conductive plates separated by an insulator. Capacitors are used in filters, analog-to-digital converters, memory devices, various control applications, and mixed signal and analog devices, for example.
There is a demand in semiconductor device technology to integrate many different functions on a single chip, e.g. manufacturing analog and digital circuitry on the same die. MIM capacitor (MIMcap's) are often used in these integrated circuits. A MIM capacitor is a particular type of capacitor having two metal plates sandwiched around a capacitor dielectric that is parallel to a semiconductor wafer surface. They are rather large in size, being several hundred micrometers wide, for example, depending on the capacitance, which is much larger than a transistor or memory cell, for example. MIM capacitors are typically used as decoupling capacitors for microprocessor units (MPU's), RF capacitors in high frequency circuits, and filter and analog capacitors in mixed-signal products, as examples.
To form a MIMcap, the top metal plate must be lithographically patterned and etched. Prior art methods of etching the top metal plate typically utilize reactive ion etching (RIE). The RIE process should stop upon contact with the capacitor dielectric with minimal erosion of the capacitor dielectric in order to have good reliability performance. Erosion of the capacitor dielectric during the top metal plate RIE, particularly at the edges, has been shown to significantly deteriorate the reliability of a MIMcap.
SUMMARY OF THE INVENTION
Embodiments of the present invention achieve technical advantages as a method of fabricating a MIM capacitor and structure thereof, wherein the top plate is etched back or has a pull-back region beneath an etch stop layer, which improves the capacitor performance. The top plate edges are etched back so that no part of the top plate resides over a thinned region of capacitor dielectric.
In accordance with a preferred embodiment of the present invention, a method of manufacturing a semiconductor device includes providing a workpiece, depositing a first conductive layer over the workpiece, and depositing a capacitor dielectric over the first conductive layer. A second conductive layer is deposited over the capacitor dielectric layer, and a first insulating layer is disposed over the second connective layer. A photoresist is deposited over the first insulating layer, and the photoresist is patterned. Then, using the photoresist as a mask, the first insulating layer and the second conductive layer are patterned, leaving the edges of the second conductive layer exposed. The photoresist is removed, and a portion of the second conductive layer edges is then removed.
In accordance with another preferred embodiment of the present invention, a method of fabricating a MIM capacitor includes providing a workpiece, depositing a first conductive layer over the workpiece, and depositing a capacitor dielectric layer over the first conductive layer. A second conductive layer is deposited over the capacitor dielectric layer, an etch stop material is deposited over the second conductive layer, and a photoresist is deposited over the etch stop layer. The photoresist is patterned, and the photoresist is used as a mask to pattern the etch stop layer and the second conductive layer, leaving the edges of the second conductive layer exposed. The patterned second conductive layer forms a top plate of a MIM capacitor. The method includes removing the photoresist, removing a portion of the second conductive layer edges, patterning the capacitor dielectric layer, and patterning the first conductive layer to form a bottom plate of a MIM capacitor.
In accordance with yet another preferred embodiment, a MIM capacitor includes a comprising a bottom plate, the bottom plate having a first width, a capacitor dielectric disposed over the bottom plate, and a top plate disposed the capacitor dielectric. The top plate has a second width, wherein the second width is less than the first width. An etch stop material is disposed over the top plate, the etch stop material having a third width, wherein the second width is less than the third width.
Advantages of embodiments of the present invention include providing an improved MIM capacitor having a larger breakdown voltage and fewer incidents of electrical shorts. The MIM capacitor is less likely to have etch residue or defects due to under-etching the capacitor dielectric while patterning the top plate.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.
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Fayaz Mohammed Fazil
Kerst Uwe
Mezzapelle Joseph J.
Yang Haining
Infineon - Technologies AG
Picardat Kevin M.
Slater & Matsil L.L.P.
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