Miller de-compensation for differential input, differential...

Amplifiers – Sum and difference amplifiers

Reexamination Certificate

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C330S009000, C330S292000

Reexamination Certificate

active

06731163

ABSTRACT:

FIELD OF INVENTION
The present invention relates to operational amplifiers. More particularly, the present invention relates to a Miller de-compensation technique and circuit for a differential input, differential output (DIDO) amplifier that provides increased differential mode bandwidth while maintaining common-mode and differential mode stability.
BACKGROUND OF THE INVENTION
The demand for improved amplifiers, such as differential input, differential output amplifiers (DIDO's), continues to increase. DIDO amplifiers are frequently being used in instrumentation applications, as well differential transmitter and receiver, and differential driver applications. DIDO amplifiers, like any other amplifier configuration, are required to have good common-mode stability for operation. However, this necessity to maintain good common-mode stability typically comes at the expense of narrower bandwidth in differential mode operation, as described in the following three paragraphs.
Op-amps frequently serve a constituent blocks to DIDO amplifiers. In particular, multistage op-amps, while useful in realizing DIDO amplifiers, exhibit a high-frequency excess phase that requires the op-amps to be frequency-compensated (hereinafter referred to as, “compensated”) according to the most stringent stability condition present in the feedback environment in which the op-amps operate. One compensation technique commonly used in op-amps to facilitate stability is that of Miller effect compensation which includes the use of capacitance devices, e.g., a compensation capacitor, coupled in a feedback path between a feedback compensation node configured within the op-amp and an output of the op-amp. Miller compensation capacitors are generally configured to facilitate a well-controlled 20 dB/decade frequency roll-off in the frequency response of the op-amp.
For example, with reference to
FIG. 1
, a differential input/differential output amplifier
100
is illustrated. Amplifier
100
comprises a first op-amp A
1
and a second op-amp A
2
having non-inverting input terminals IN
1
and IN
2
configured as a differential input port, and output terminals OUT
1
and OUT
2
configured as a differential output port. A pair of resistors R
1
and R
2
is configured in a feedback arrangement between inverting input terminals of first op-amp A
1
and second op-amp A
2
and output terminals OUT
1
and OUT
2
, respectively. In addition, a spanning resistor R
0
can be suitably coupled between the inverting input terminals of first op-amp A
1
and second op-amp A
2
in order to increase the DIDO amplifier gain above unity. As discussed, a pair of Miller compensation capacitors C
C1
and C
C2
is configured from feedback the compensation nodes of first op-amp A
1
and second op-amp A
2
to output terminals OUT
1
and OUT
2
, respectively.
Miller compensation capacitors C
C1
and C
C2
generally are chosen such that first op amp A
1
and second op-amp A
2
be compensated for unity-gain stability to avoid a common-mode oscillation at output terminals OUT
1
and OUT
2
. For unity gain stability, first op amp A
1
and second op amp A
2
can require, for example, 55 pF of compensation from compensation capacitors C
C1
and C
C2
based upon a customary measure of stability. (This measure may be, for instance, 45 degrees of phase margin.) Unfortunately, for differential-mode gains greater than unity, the differential mode response is overcompensated, resulting in narrower than optimal differential mode bandwidth.
DIDO amplifiers can be configured in various applications, including applications comprising fixed-gain amplifiers and applications comprising programmable gain amplifiers. In a fixed-gain application, such as can be illustrated with reference again to
FIG. 1
, resistor R
0
provides a fixed resistance, and thus a fixed gain, to DIDO amplifier
100
. Meanwhile, programmable gain amplifiers are ideal for applications where input signal levels can vary. Programming of the desired gain may be accomplished through mechanical means. Such programmable gain amplifiers can include a readily configurable gain device, such as that illustrated in
FIG. 3
including a variable resistance device R
0
within an amplifier
300
. However, typical communication applications require that the gain configuration be digitally programmable, such as through the use of various programmable switches which sample a tapped, passive divider network.
For example, with reference to
FIG. 2
, an exemplary programmable gain amplifier
200
comprising a differential input/differential output configuration is illustrated. Programmable gain amplifier
200
comprises a first op-amp Al and a second op-amp A
2
having positive input terminals IN
1
and IN
2
configured as a differential input port, and output terminals OUT
1
and OUT
2
configured as a differential output port. To provide a programmable gain function, a tapped passive divider network
202
, comprising a tapped resistor, is coupled between output terminals OUT
1
and OUT
2
and inverting input terminals of first op-amp A
1
and a second op-amp A
2
through switch devices
204
and
206
. In this example, switched devices
204
and
206
comprise MOSFET-type switches multiplexed together and configured to receive control signals, e.g., control signals A, B and C. However, tapped passive divider network
202
and switch devices
204
and
206
can comprise various configurations for facilitating programmable gain within amplifier
200
. As is the case with DIDO amplifiers generally, op-amps A
1
and A
2
are typically compensated for unity-gain stability, leading to narrower than optimal differential-mode bandwidth.
Solutions exist for resolving the common-mode stability/differential mode bandwidth in some fixed gain applications. For example, in conventional fixed-gain amplifiers, such as that illustrated in
FIG. 1
, the implementation of a current feedback configuration for op-amps A
1
and A
2
can maintain a high bandwidth for differential mode, since the open loop gain of the op-amps increases at the same rate as the increase in the closed loop gain. This effect is due to presence of R
0
, which serves to increase the closed-loop gain of DIDO amplifier
100
, while simultaneously increasing the effective transconductance, i.e., 1/(R
1
∥R
0
/2), of op-amps A
1
and A
2
.
However, such current feedback op-amps are impractical or cannot be used with programmable gain amplifiers, such as that illustrated in
FIG. 2
, particularly because of the use of switch networks having a varying conductance. For example, with reference to
FIG. 2
, wherein A
1
and A
2
are assumed to be current-feedback op-amps, the bias current I
B
can be fairly large, such as 1 microamp or more. This large bias current I
B
flowing through switches
204
and
206
can lead to distortion, i.e., bias current I
B
times the varying g
ds
of switches
204
and
206
results in an error signal V
ERR
which leads to distortion.
In addition, current feedback amplifier configurations are significantly more practical for bipolar applications than for MOS applications, which are becoming increasingly prominent. For example, to improve the bandwidth during differential mode operation, an excess of transconductance is required by the current feedback op-amp. However, to achieve that high level of transconductance, significantly greater device area and current are required for the MOS devices than are required for bipolar devices, thus making the current feedback amplifier less desirable for MOS designs.
Accordingly, a need exists for technique for maintaining common mode stability in operational amplifiers, such as differential input, differential output amplifiers, without reducing differential mode bandwidth.
SUMMARY OF THE INVENTION
The method and circuit according to the present invention addresses many of the shortcomings of the prior art. In accordance with various aspects of the present invention, a Miller de-compensation technique and circuit is provided for a differential input, differential output (DIDO) a

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