Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
1999-11-05
2002-09-24
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S280000
Reexamination Certificate
active
06455880
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention is related to a semiconductor device having a dielectric thin film for a high frequency transmission line on the surface of a semiconductor substrate. And especially, the invention pertains to the high frequency semiconductor devices operating in microwave or millimeter wave bands, and to high frequency semiconductor integrated circuits such as Microwave Monolithic Integrated Circuits (MMICs).
2. Description of the Related Art
By the rapid increase of demands for the recent information communication fields, it becomes urgent to increase the communication channel number. Therefore, the practical communication systems using the microwave or millimeter waves, which have not been so widely used up to now, are required to be exploited rapidly. RF part of the high frequency communication instrument is generally composed of an oscillator, a synthesizer, a modulator, a power amplifier, a low-noise amplifier, a demodulator and an antenna, etc. In the radio communication instrument, the excellent electrical characteristics and the miniaturized package size are desired. For integrating the necessary circuits in one semiconductor chip, the configuration of the MMIC is desirable, when the miniaturization of the chip size of the high frequency semiconductor integrated circuit is considered. With the development of the semiconductor integrated circuit technology, the degree of the one chip integration of the MMIC is rapidly advancing. That is to say, the number of circuits merged in a single semiconductor chip is increasing so as to increase the integration density. Therefore, integration density is increasing from the simple conventional semiconductor chip mounting discrete semiconductor active elements to a higher density semiconductor chip, which merges functional blocks fulfilling predetermined circuit functions, respectively. In addition, as the integration density rises, the complicated and sophisticated configurations, by which multiple functional blocks are mounted on an identical semiconductor chip, are also being developed.
In the MMIC, semiconductor active elements, such as high electron mobility transistors (HEMTs), heterojunction bipolar transistors (HBTs), or Schottky gate FETs (MESFETs), and passive elements such as capacitors, inductors and high frequency transmission lines, etc. are merged in a single semiconductor chip. The known and typical types of the high frequency transmission line used, in general, for the MMIC operating at microwave or millimeter wave bands are the Micro Strip line (hereinafter abbreviated as “MSL”) and the Coplanar Waveguide (hereinafter abbreviated as “the CPW”).
FIG. 1
is a sectional view showing example of wiring metal of the high frequency semiconductor device, which is cited as a base, or an illustrative example of the present invention. The metal patterns
61
,
62
,
63
are disposed on the top surface of a semiconductor substrate
1
. Employing the narrow central metal strip
63
and a couple of wide ground metal plates
62
sandwiching the central metal strip
63
, the CPW
7
is constructed. In
FIG. 1
, the broken lines between the central metal strip
63
and the ground metal plates
62
typically show the electric fields E. The instantaneous direction of the electric fields E changes with time according to the operation frequency. And, the MSL
13
are constructed with the bottom ground metal plate
12
disposed on the bottom surface of the semiconductor substrate
1
and the narrow metal strip
61
disposed on the top surface of the semiconductor substrate
1
. The broken lines between the bottom ground metal plate
12
and the metal strip
61
are the electric fields E. By the methodology arranging the CPW
7
and the MSL
13
structures on an identical plane level on the semiconductor substrate
1
as shown in
FIG. 1
, the occupation area for wirings of the semiconductor device must inevitably become wide.
Therefore, the structure for the high frequency semiconductor device employing the dielectric thin film
3
as shown in
FIG. 2
was proposed for further miniaturization of the device size. In
FIG. 2
, the first metal layer (
64
,
65
) is disposed on the top surface of semiconductor substrate
1
, and the dielectric thin film
3
covers the top surface of the first metal layer (
64
,
65
). The second metal layer (
61
a,
61
b
) are disposed over this the dielectric thin film
3
. In
FIG. 2
, two thin film microstrip lines (hereinafter abbreviated as “the TFMSLs”)
6
are constructed between the second metal layer
61
a
and the first metal layer
64
, and between the second metal layer
61
b
and the first metal layers
64
. In addition, employing a couple of wide metal plates
64
sandwiching the central narrow metal strip
65
, all are disposed under the dielectric thin film
3
as the first metal layer, the CPW
7
is constructed. In
FIG. 2
, broken lines respectively show the electric fields E between the second metal layer
61
a
and the first metal layer
64
, between the second metal layer
61
b
and the first metal layer
64
, and between the first metal layer (
64
,
65
). Hence, the miniaturization of the chip size is being attempted by sandwiching the dielectric thin film
3
with the first metal layer (
64
,
65
) and the second metal layer (
61
a,
61
b
) so as to reduce the wiring area for the high frequency transmission lines.
As described above, in the high frequency semiconductor device having the dielectric thin film, as shown in
FIG. 2
, the CPW, the TFMSL structures are preferable for the high frequency transmission lines. However, “the effective dielectric constant ∈
eff
” of the CPW structure shown in
FIG. 2
must become larger than that shown in
FIG. 1
, on which there is no covering dielectric layer on the CPW structure. Namely, the effective dielectric constant ∈
eff
of the CPW
7
constructed with the first metal layer (
64
,
65
) and the second metal layer
61
a,
61
b
must increase, since the dielectric thin film
3
having the same thickness as the dielectric layer of the TFMSL structure is stacked on the CPW
7
. “The effective dielectric constant ∈
eff
” is an virtual dielectric constant of a homogeneous dielectric material, which determines the CPW high frequency transmission characteristics, assuming that the CPW is surrounded by spatially infinite dielectric material. Or, the effective dielectric constant ∈
eff
may be defined as the dielectric constant of the homogeneous dielectric material disposed within the range to which effective electromagnetic fields from the CPW structure can affect. For example, the effective dielectric constant ∈
eff
of the CPW
7
shown in
FIG. 1
is determined both by the dielectric constant ∈
0
of the air and the dielectric constant ∈
s
of semiconductor substrate
1
, through which the electric fields E penetrating. In the meantime, the effective dielectric constant ∈
eff
of the CPW
7
shown in
FIG. 2
is determined both by the dielectric constant ∈
i
of the dielectric thin film
3
and the dielectric constant ∈
s
of semiconductor substrate
1
. However, the dielectric constant ∈
i
of the dielectric thin film
3
is larger than dielectric constant ∈
0
of the air. Therefore, the effective dielectric constant ∈
eff
of the CPW
7
shown in
FIG. 2
becomes larger than the corresponding effective dielectric constant ∈
eff
of the CPW
7
shown in FIG.
1
. And, the characteristic impedance Z
0
of the CPW
7
shown in
FIG. 2
decreases significantly, because it is proportional to the reciprocal of the square root of the effective dielectric constant ∈
eff
, so that the characteristic impedance Z
0
of the CPW
7
shown in
FIG. 2
becomes lower than structure shown in FIG.
1
. And, by the increase of the effective dielectric constant ∈
eff
, the crosstalk between adjacent CPWs increases in the structure shown in FIG.
2
. Therefore, according to the background art shown in
FIG. 2
, there was a proble
Iseki Yuji
Ono Naoko
Onomura Junko
Takagi Eiji
Yamaguchi Keiichi
Kabushiki Kaisha Toshiba
Munson Gene M.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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