Microwave power limiter comprising a dual-gate FET

Details Microwave power limiter comprising a dual-gate FET Microwave power limiter comprising a dual-gate FET

1977-10-03

1979-09-11

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 328171, 328172, 333 17L, H03G 1104, H04B 304

Patent

active

041676815

ABSTRACT:
A microwave power limiter for generating an output RF signal of substantially constant power level in response to an input RF signal of varying power level comprises a dual gate field effect transistor (FET). The FET is biased such that the RF power output variation is small compared to the input power variation in the saturation region. A number of FET cascaded stages may be utilized to reduce this power output variation. A small signal amplifier including a number of FET cascaded stages may be employed in the limiter to increase the power level to that gain or drive level compatible with the saturated FET stages.

REFERENCES:
patent: 4079325 (1978-03-01), Mawhinney et al.
Rosen et al., RCA Review (pub.), vol. 38, 6/1977; pp. 253-256.
Int'l Microwave Symposium; Microwaves (pub.), pp. 9-10; 6/77.
Fukuda et al., IEEE Microwave Theory and Techniques (MTT) Conf.; 6/1977.

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