Microprogrammed control data processing apparatus in which opera

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G06F 942, G06F 934, G06F 936

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048071137

ABSTRACT:
A microprogram controlled data processing apparatus executes multi-operand instructions in which one or more operand specifiers are provided for specifying the addressing for each operand independently from the operation code of the instruction. An instruction execution unit receives a top address of a microprogram from a decoding unit, a ready status signal and a signal from the decoding unit indicating whether a destination of an operand is in a general purpose register or in a memory unit, and writes an operand into a destination address of a register on the memory unit under control of a microprogram. Because the destination of the operand is indicated by the instruction decoding unit, it is not necessary to determine this information by microinstruction execution, with the result that execution of the instruction can be performed at high speed.

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"VAX 11 Architecture Handbook", Digital Equipment Corp., 1979, pp. ii-vii, Chapt. 5 (78-118).
"Pipeline Architecture", Ramamoorthy and Li, Computing Surveys, vol. 9, No. 1, 3/77.

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