Microprogram controller in which instruction following condition

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G06F 932, G06F 938

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active

047730021

ABSTRACT:
In a microprogram controller by pipeline control which includes a memory for storing a microprogram and a program counter for representing the address of the memory, a microprogram controller includes means for judging whether or not a branch condition of a branch microinstruction is satisfied and means for converting the microinstruction fetched from the memory to a NOP (No Operation) microinstruction from the output of the next step of the memory till the outputs after a plurality of steps by the affirmation output of the judging means. When the affirmation output is obtained from the judging means, part of the memory output is loaded into the program counter and when the negation output is obtained, a value as the sum of a current value plus 1 is loaded into the program counter.

REFERENCES:
patent: 4095278 (1978-06-01), Kihara
patent: 4179731 (1979-12-01), Yamazaki
patent: 4398247 (1983-08-01), Bazlen et al.
patent: 4415969 (1983-11-01), Bagliss et al.
patent: 4514804 (1985-04-01), Kimoto

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