Excavating
Patent
1989-10-04
1992-09-01
Beausoliel, Robert W.
Excavating
G06F 1110
Patent
active
051446286
ABSTRACT:
A microprogram controller in a data processing apparatus includes a control storage device which has ECC bits and tri-state input/output pins, a first register for holding microprogram data read out from the control storage device and all the bits of the ECC data, an error detection/correction circuit for performing an ECC check operation on the basis of an output value of the first register and correcting a correctable error, second to Nth registers for holding only some bits of the microprogram data read out from the control storage device, and a data bus for connecting the control storage device, an input and an output of the first register, and inputs of the second to Nth registers. When a correctable error is detected on the basis of the output value of the first register, data corrected by the error detection/correction circuit is sent onto the data bus, and the second to Nth registers fetch the corrected data from the data bus.
REFERENCES:
patent: 4204634 (1980-05-01), Barsuhn
patent: 4521872 (1985-06-01), Sawada
patent: 4701915 (1987-10-01), Kitamura
patent: 4866718 (1989-09-01), Fosdick
patent: 4918695 (1990-04-01), Scheuneman
patent: 4955023 (1990-09-01), Tanimoto
Hellerman et al., "Computer System Performance", McGraw-Hill Book Company, 1975, pp. 146-149.
Beausoliel Robert W.
NEC Corporation
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