Boots – shoes – and leggings
Patent
1988-12-20
1992-03-31
Fleming, Michael R.
Boots, shoes, and leggings
3642551, 364955, 364DIG1, 364DIG2, 395800, G06F 1200, G06F 1204, G06F 932
Patent
active
051013436
ABSTRACT:
A microprocessor having a word data memory has a CPU data bus, an address register, an incrementer, a first byte data memory circuit, a second byte data memory circuit, a data input switching circuit and a data output switching circuit. The address register stores all the bit information of an address on the CPU data bus in response to a latching signal. The incrementer receives an address specifying signal as well as a logical product. The first byte data memory circuit provides a logical addition. The second byte data memory circuit receives an address specifying output. The data input switching circuit selectively transfers both word writing and byte writing data into the first and second byte data memory circuits. The data output switching circuit selectively transfers both word and byte data from the memory circuits to the CPU data bus.
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patent: 4604695 (1986-08-01), Widen et al.
patent: 4777591 (1988-10-01), Chang et al.
Lenk, John D.; Handbood of Microprocessor, Microcomputers, and Mini Computers; Prentice--Hall, Inc. 1979, pp. 71-73, 206, 270-272.
Auve Glenn A.
Electric Industry Co. Ltd.
Fleming Michael R.
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