Microprocessor with parallel operation

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G06F 300

Patent

active

040500586

ABSTRACT:
A highly parallel microprocessor using a logic gating structure and a microinstruction organization which permits direct access by each of the microprocessor components to a tri-bus system. Operation is defined by a single phase clock, during which all portions of a microinstruction are executed. The system further permits overlap operation for microprocessor instructions, thereby allowing for the fetching of a next instruction while executing a current instruction. The use of general purpose, non-dedicated registers is contemplated, thereby to avoid the need for multi-phase clocking.

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patent: 3798615 (1974-03-01), Weisbecker
patent: 3909790 (1975-09-01), Shapiro et al.
patent: 3938098 (1976-02-01), Garlic

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