Microprocessor with on-chip cache memory with lower power consum

Details Microprocessor with on-chip cache memory with lower power consum Microprocessor with on-chip cache memory with lower power consum

1988-06-27

1991-05-21

Chan, Eddie P.

Boots, shoes, and leggings

3642318, 36424341, 3642731, G06F 1200

Patent

active

050180614

ABSTRACT:
A microprocessor with on-cache memory and an address translation buffer in which it further comprises first and second flip-flop circuits for indicating in hit or miss in the tag field of the cache memory and for storing which of the X and Y sections of the tag field a target data exists. Access to the tag field is carried out prior to access to the data field of the cache memory, thereby preventing access to the data field when a miss occurs in the tag field, and thus decreasing power consumption.

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MC68030 Enhanced 32-Bit Microprocessor User's Manual; Motorola; Section 6, "On-Chip Cache Memories".
1987 IEEE International Solid-State Circuits Conference; Session II:32b Microprocessors; H. Kadota et al., pp. 36-37.
William S. Carter, "A New High Performance Microprocessor with Z80 Software Compatibility", Mini-Micro Conference Record, 8-11 Nov. 1983, Chap. 13/3, pp. 1-6.
I. K. Hetherington et al., "3B20D Processor Memory Systems", The Bell System Technical Journal, vol. 62, No. 1, Part 2, Jan. 1983, pp. 207-220.

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