Boots – shoes – and leggings
Patent
1984-01-03
1987-02-24
Eng, David Y.
Boots, shoes, and leggings
G06F 1300
Patent
active
046462325
ABSTRACT:
A microprocessor device used as an adapter for a communications loop of the closed-ring, token-passing, local area network type. Each station on the ring has a host processor with a host CPU, a main memory, and a system bus. The microprocessor device, operating relatively independent of the host CPU, is coupled to the main memory by the system bus and includes a local CPU, a local read/write memory, an on-chip timer, a local bus and a bus arbiter. A transmit/receive controller is connected between the ring and the microprocessor device. This controller is coupled to the local bus to directly access the local read/write memory, also under control of the bus arbiter. The local CPU executes instructions fetched from a ROM accessed by the local bus, so the local CPU instruction fetch, the direct memory access from the transmit/receive controller for transmitting or receiving data frames, and the access from the host CPU for copying transmitted or received message frames, all contend for the local bus. Bus arbitration with appropriate priorities is used to control access to the local bus. The on-chip timer accessed by the local bus provides the time period used to monitor and control the communications protocol.
REFERENCES:
patent: 3879710 (1975-04-01), Maxemchuk et al.
patent: 4007450 (1977-02-01), Haibt
patent: 4103336 (1978-07-01), Gindi et al.
patent: 4348743 (1982-09-01), Dozier
patent: 4354229 (1982-10-01), Davis
patent: 4429360 (1984-01-01), Hoffman et al.
patent: 4481578 (1984-11-01), Hughes et al.
patent: 4493021 (1985-01-01), Agrawal et al.
patent: 4494185 (1985-01-01), Gunderson et al.
Chang Ki S.
Patrick Michael W.
Sacarisen Stephen P.
Stambaugh Mark A.
Eng David Y.
Graham John G.
Texas Instruments Incorporated
LandOfFree
Microprocessor with integrated CPU, RAM, timer, bus arbiter data does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Microprocessor with integrated CPU, RAM, timer, bus arbiter data, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microprocessor with integrated CPU, RAM, timer, bus arbiter data will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-113383