Microprocessor with highly configurable pipeline and...

Details Microprocessor with highly configurable pipeline and... Microprocessor with highly configurable pipeline and...

2008-05-29

2011-12-13

Faherty, Corey S (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

C712S229000

Reexamination Certificate

active

08078833

ABSTRACT:
The invention resides in a flexible data pipeline structure for accommodating software computational instructions for varying application programs and having a programmable embedded processor with internal pipeline stages the order and length of which varies as fast as every clock cycle based on the instruction sequence in an application program preloaded into the processor, and wherein the processor includes a data switch matrix selectively and flexibly interconnecting pluralities of mathematical execution units and memory units in response to said instructions, and wherein the execution units are configurable to perform operations at different precisions of multi-bit arithmetic and logic operations and in a multi-level hierarchical architecture structure.

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