Microprocessor with compressed control ROM

Details Microprocessor with compressed control ROM Microprocessor with compressed control ROM

1980-11-24

1983-08-30

Zache, Raulfe B.

Boots, shoes, and leggings

365 94, 365200, G11C 700

Patent

active

044020430

ABSTRACT:
A single-chip microprocessor device of the MOS/LSI type contains an ALU, several interal busses, a number of address/data registers, and an instruction register with associated control decode or microcontrol generator circuitry. The device communicates with external memory and peripherals by a bidirectional multiplexed address/data bus and a number of control lines. The control ROM is an array of rows and columns of potential MOS transistors. This ROM is compressed by eliminating column lines which contain no transistors, and eliminating column decode circuitry associated with such column lines. The number of lines which can be eliminated is increased by reducing the number of row lines (thereby lengthening the row lines) and selecting default conditions of controls (by inverting some outputs) to increase the number of vacant positions in the ROM.

REFERENCES:
patent: 3654610 (1972-04-01), Sander et al.
patent: 4106090 (1978-08-01), Erickson et al.
patent: 4139907 (1979-02-01), Blahut et al.

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