Boots – shoes – and leggings
Patent
1986-09-26
1989-11-28
Harkcom, Gary V.
Boots, shoes, and leggings
G06F 700
Patent
active
048842311
ABSTRACT:
A microprocessor for processing operand bits has a 16 bit primary arithmetic logic unit (ALU) and shifter and a 24 bit auxiliary ALU and shifter operating in conjunction with the primary ALU. Some of the total number of operand bits are loaded into the auxiliary ALU and processed therein in advance of the processing of bits in the primary ALU. This permits a 16 bit microprocessor to perform operations with 32 bit or 48 bit operands without any performance penalties and without requiring an increase in the microcode utilized. The invention is particularly useful and valuable in such operations as multiplication and division operations, that are of a highly repetitive nature, and for all floating point operations.
REFERENCES:
patent: 4594655 (1986-06-01), Hao et al.
patent: 4612628 (1986-09-01), Beauchamp et al.
patent: 4617641 (1986-10-01), Hamada
Mor Yeshayahu
Sandman Leonardo
Harkcom Gary V.
Nguyen Long T.
Performance Semiconductor Corporation
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