Microprocessor system including a cache controller which remaps

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364DIG1, G06F 1210

Patent

active

052789640

ABSTRACT:
A cache controller for a set associative cache selectively remaps predetermined bits of the cache address so as to confine data from a single memory page to a particular block of the cache memory. When changing a memory page, only the particular block of the cache in which data from that page may be stored is flushed, thereby preserving the remaining contents of the cache.

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patent: 4849875 (1989-07-01), Fairman et al.
patent: 4953079 (1990-08-01), Ward et al.
patent: 5010475 (1991-04-01), Hazawa
patent: 5033027 (1991-07-01), Amin

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