Excavating
Patent
1996-04-18
1997-09-16
Beausoliel, Jr., Robert W.
Excavating
371 224, 371 226, 39518318, 39518321, G06F 1100
Patent
active
056689470
ABSTRACT:
A method and apparatus for testing a digital integrated circuit (IC) for faults wherein the IC includes a memory, a microprocessor, an operand register, and a random data generator which is responsive to integrated circuit data indicative of the instantaneous IC state. A short test code including operational code instructions in the memory is performed by the microprocessor which manipulates data in the operand register. Periodically, the random data generator provides seed data to the microprocessor which changes the test code in a random manner and modifies the data stored in the operand register. At the end of a prescribed number of passes through the test code, the data generator produces an IC signature which can be compared to a known correct signature to identify IC faults.
REFERENCES:
patent: 4433413 (1984-02-01), Fasang
patent: 4688222 (1987-08-01), Blum
patent: 4817093 (1989-03-01), Jacobs et al.
patent: 4903199 (1990-02-01), Keenan et al.
patent: 5436971 (1995-07-01), Armbrust
patent: 5444716 (1995-08-01), Jarwala et al.
patent: 5515384 (1996-05-01), Horton, III
Allen-Bradley Company Inc.
Beausoliel, Jr. Robert W.
Horn John J.
Jaskolski Michael A.
Le Dieu-Minh
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