Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit
Reexamination Certificate
2001-05-21
2002-11-26
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Particular stable state circuit
C327S143000, C327S398000, C327S394000
Reexamination Certificate
active
06486718
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to circuits for controlling the powering down of microcontroller-, microprocessor-, and microcomputer-controlled instruments.
BACKGROUND OF THE INVENTION
Several systems for regulating or controlling the supply of power to microcontrollers, microprocessors and microcomputers, sometimes collectively referred to hereinafter as &mgr;Cs, and other types of circuits in instruments for monitoring or testing the concentrations of medically significant components of body fluids and the like. Such systems are illustrated in, for example, U.S. Pat. Nos. 4,698,530; 4,713,555; 4,868,832; 4,951,171; 4,963,814; 5,010,469; 5,117,324; 5,341,034; 5,594,906; and, 5,792,944. There are also the systems described in Sherman, Len and Doug Vargha, “Optimize Microprocessor Supervisory Circuits,”
Electronic Design
, vol. 42, no. 18, 1994, pp. 67-76. No representation is intended that a complete search has been made of the prior art or that no better art references than those listed here exist, nor should any such representation be inferred. This listing shall not be construed to be an admission that the listed references are, or are considered to be, material to patentability, nor should any such admission be inferred.
&mgr;Cs that have power down modes typically draw a small amount of current when they are powered down. The lifetimes of batteries in battery operated devices of this type are compromised by this current drain during times of inactivity. Three commonly employed techniques for reducing the current drain on a battery during times of inactivity in this type of application are: the use of a toggle switch only, which requires the operator to turn the circuit off in order to be effective; the use of the &mgr;C power down mode, which consumes power, thus reducing the life of a battery used to power the instrument; and, the use of a power supervisor circuit which also consumes power, thus reducing battery life.
DISCLOSURE OF THE INVENTION
According to the invention, a self-power down circuit is provided for a circuit including a battery and a controller coupled to the battery to obtain power from the battery. The controller has a port, the state of which changes during powering up of the controller. The circuit includes a first switching device including a main current conducting path and a control terminal. The control terminal of the first switching device is coupled to the port for monitoring the state of the port. The circuit further includes a second switching device including a main current conducting path and a control terminal, and a switch. The port is coupled to the battery through the main current conducting path of the second switching device. The control terminal of the second switching device is coupled to the switch for actuation by actuation of the switch. The control terminal of the second switching device is also coupled to the main current conducting paths of the first and second switching devices through first and second voltage dropping elements, respectively.
Illustratively according to the invention, the first switching device includes a first field effect transistor (FET). The main current conducting path of first FET includes its drain and source terminals. The control terminal of the first FET is its gate terminal.
Further illustratively according to the invention, the main current conducting path of the first FET is coupled to a first terminal of the switch. A second terminal of the switch is coupled to the control terminal of the second switching device.
Additionally illustratively according to the invention, the main current conducting path of the first FET is coupled through the first voltage dropping element to the first terminal of the switch.
Illustratively according to the invention, the first voltage dropping element includes a first voltage dropping element resistor.
Illustratively according to the invention, the second switching device includes a second FET. The main current conducting path of the second FET includes its drain and source terminals. The control terminal of the second FET is its gate terminal.
Further illustratively according to the invention, the second voltage dropping element includes a second voltage dropping element resistor. The gate of the second FET is coupled through the second voltage dropping element resistor to one of the source and drain of the first FET.
Additionally illustratively according to the invention, the main current conducting path of the first FET is coupled to a first terminal of the switch. A second terminal of the switch is coupled to the gate of the second FET.
Illustratively according to the invention, the main current conducting path of the first FET is coupled through the first voltage dropping element to the first terminal of the switch.
Illustratively according to the invention, the port is coupled through a software switch, a voltage regulator and the main current conducting path of the second switching device to the battery.
Further illustratively according to the invention, the port includes a port of one of a microcontroller, microprocessor or microcomputer.
REFERENCES:
patent: 3559072 (1971-01-01), Davisson
patent: 3810203 (1974-05-01), Mori et al.
patent: 3879137 (1975-04-01), Sakazaki et al.
patent: 4269496 (1981-05-01), Motoori et al.
patent: 4274034 (1981-06-01), Conklin
patent: 4538074 (1985-08-01), Fraden
patent: 4698530 (1987-10-01), Thomson
patent: 4713555 (1987-12-01), Lee
patent: 4868832 (1989-09-01), Marrington et al.
patent: 4951171 (1990-08-01), Tran et al.
patent: 4963814 (1990-10-01), Parks et al.
patent: 5010469 (1991-04-01), Bobry
patent: 5117324 (1992-05-01), Johnson, Jr.
patent: 5341034 (1994-08-01), Matthews
patent: 5543741 (1996-08-01), Purits
patent: 5594906 (1997-01-01), Holmes, II et al.
patent: 5792944 (1998-08-01), Lennert et al.
“Optimize Microprocessor Supervisory Circuits”,Len Sherman and Doug Vargha, Electronic Design, Sep. 5, 1994, pp. 67-76.
Holmes, II John S.
Stelle, IV Raleigh B.
Cunningham Terry D.
Roche Diagnostics Corporation
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