Microprocessor operable in a functional redundancy monitor mode

Details Microprocessor operable in a functional redundancy monitor mode Microprocessor operable in a functional redundancy monitor mode

1989-05-24

1992-08-04

Hecker, Stuart N.

Excavating

395575, 364264, 364265, 3642664, 364285, 3649493, 3649449, G06F 1100

Patent

active

051365952

ABSTRACT:
A microprocessor system having a functional redundancy monitor operation mode. This processor system includes two processors, one processor to receive external signals from a monitored processor, and compare the external signals with signals generated internally every bus cycle. The monitoring processor then produces a comparison resultant signal, indicating if a match occurs. The processor further includes a timer circuit for defining a period during which the comparison resultant signal is output. After that period, the comparison result signal is set to a logic level representative of a misoperation of the processor monitored.

REFERENCES:
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patent: 4270715 (1981-06-01), Norton et al.
patent: 4405982 (1983-09-01), Ruhnau et al.
patent: 4405983 (1983-09-01), Perez-Mendez
patent: 4497059 (1985-01-01), Smith
patent: 4562575 (1985-12-01), Townsend

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