Microprocessor memory test circuit and method

Details Microprocessor memory test circuit and method Microprocessor memory test circuit and method

1995-12-27

1997-11-18

Beausoliel, Jr., Robert W.

39518306, 39518206, G06F 1100

Patent

active

056896352

ABSTRACT:
A circuit and method for testing on-chip memory for a microprocessor or a microcomputer is disclosed. The memory test circuit includes an input register, an output register, an adder, and a sequencer to control the test process. The process includes receiving a simple communication protocol from the control unit to start the test, running a common memory test such as a checker board, AAAAh, 5555h and the like, and then storing the test results in an output register. The test circuit can include a bi-directional RESET signal means for disabling the system while the microprocessor or microcomputer runs its memory test.

REFERENCES:
patent: 4525839 (1985-07-01), Nozawa et al.
patent: 4757474 (1988-07-01), Fukushi et al.
patent: 5060230 (1991-10-01), Arimoto et al.
patent: 5115191 (1992-05-01), Yoshimori
patent: 5388104 (1995-02-01), Shirotori et al.

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