Microprocessor memory bus interface for inhibiting relatching of

Details Microprocessor memory bus interface for inhibiting relatching of Microprocessor memory bus interface for inhibiting relatching of

1990-11-28

1993-12-28

Lee, Thomas C.

Boots, shoes, and leggings

395800, 395500, 3642393, 3642542, 36492797, 3649275, 364968, 3649681, 364DIG2, G06F 1200

Patent

active

052747867

ABSTRACT:
An interface unit which can reduce the hardware cost by interfacing a microprocessor with an inexpensive memory device with a smaller word size without compromising the overall performance. The current invention improves the overall performance of the interface system by reducing the overhead address relatching without adding expensive and sophisticated pieces of hardware. This is accomplished by comparing a row address portion of the current address with that of the previous address. When a current address contains the same row address as the previously accessed memory-page, the current invention saves clock cycles by avoiding relatching of the row address portion of the address in the memory device. Such saving is significant when contiguous addresses are sequentially accessed.

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