Microprocessor having precoder unit and main decoder unit operat

Details Microprocessor having precoder unit and main decoder unit operat Microprocessor having precoder unit and main decoder unit operat

1990-08-28

1993-08-03

Harrell, Robert B.

Boots, shoes, and leggings

364DIG1, 364259, 3642599, G06F 930

Patent

active

052336964

ABSTRACT:
A microprocessor having the instruction decoding operation performed by a precoder unit and a main decoder unit which operates in a pipelined manner by providing a buffer for temporarily storing information from the precoder unit positioned between the precoder unit and the main decoder unit. The microprocessor supports different instruction formats and operand addressing modes without lowering the instruction decoding speed.

REFERENCES:
patent: 4685080 (1987-08-01), Rhodes, Jr. et al.
patent: 4873629 (1989-10-01), Harris et al.
patent: 5101341 (1992-03-01), Circello et al.

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