Microprocessor having miswriting preventing function

Details Microprocessor having miswriting preventing function Microprocessor having miswriting preventing function

1988-10-26

1991-07-30

MacDonald, Allen R.

Boots, shoes, and leggings

364900, 371 101, 371 511, 371 61, 371 62, G06F 500, G06F 1100

Patent

active

050364600

ABSTRACT:
A microprocessor system including an EEPROM with a page mode writing function that prevents writing of erroneous data. The circuit includes a memory cell array divided into a plurality of pages each having a predetermined number of bytes, a data latch for latching bytes corresponding to a page, an exterior write control circuit which enables the data latch in response to a signal from the CPU to latch a sequence of bytes corresponding to a page, and an interior write control circuit which enables the memory cell array so that the bytes latched in the data latch are transferred therefrom to a page of the memory cell array. The exterior write control circuit includes a time measurement circuit and an interior write suppression circuit. The time measurement circuit measures the time which elapses from the initiation of the latching of bytes into the data latch, and outputs an overflow signal when the measured time exceeds a predetermined limit. The interior write suppression circuit suppresses the interior write control circuit, in response to the overflow signal, so that the transfer of erroneous data bytes from the data latch to a page of the memory cell array is prevented.

REFERENCES:
patent: 4023109 (1977-05-01), Shreve
patent: 4392226 (1983-07-01), Cook
patent: 4535404 (1985-08-01), Shenk
patent: 4554461 (1985-11-01), Oho et al.
patent: 4584684 (1986-04-01), Nagasawa et al.
patent: 4591782 (1986-05-01), Germer
patent: 4618953 (1986-10-01), Daniels et al.
patent: 4780602 (1988-10-01), Kowana et al.
patent: 4866713 (1989-09-01), Worger et al.
patent: 4872168 (1989-10-01), Aadsen et al.
patent: 4903239 (1990-02-01), Akashi
patent: 4912708 (1990-03-01), Wendt
"+5V Single-Power-Source Operated 64K EEPROM with Page-Write and Polling Function" from Nikkei Electronics (Jan. 1984).
"EEPROM On-Chip Single-Chip Microcomputer" extracted from a monthly magazine Hitatchi Hyoron, Jul. 1986 issue.
64K bit CMOS EEPROM "HN58C65" extracted from a monthly magazine entitled Hitachi Hyoron Jul. 1986 issue.

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