Microprocessor having functional redundancy monitoring mode of o

Details Microprocessor having functional redundancy monitoring mode of o Microprocessor having functional redundancy monitoring mode of o

1989-08-14

1991-10-01

Atkinson, Charles E.

Excavating

364200, 3642684, 3642664, G06F 1116

Patent

active

050540262

ABSTRACT:
A microprocessor according to the present invention is established in either data processing or monitoring mode of operation, and an address code and a data code produced by itself in the monitoring mode of operation are compared with corresponding address and data codes supplied from another microprocessor in the data processing mode of operation so as to decide whether or not aforementioned another microprocessor performs without any troubles, wherein address and data comparator units of the microprocessor respectively produce an address matching signal and a data matching signals upon respective coincidences between the address and data codes and the corresponding address and data codes, however, a delay unit retards the address matching signal by a predetermined time period in a pipeline bus cycle so as to match the address matching signal with the data matching signal.

REFERENCES:
patent: 4541094 (1985-09-01), Stiffler et al.
patent: 4590549 (1986-05-01), Burrage et al.
patent: 4697233 (1987-09-01), Scheuneman et al.
patent: 4849979 (1989-07-01), Maccianti et al.

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