Microprocessor having combined shift and rotate circuit

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

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712223, 712 1, G06F 738

Patent

active

059615753

ABSTRACT:
Circuit for performing arithmetic operations in a 32-bit architecture. The circuit includes a five stage shift and rotate circuit coupled between first and second 32-bit busses in the following sequence: an 8-bit shift and rotate circuit, a 16-bit shift and rotate circuit, a 1-bit shift and rotate circuit, a 2-bit shift and rotate circuit and a 4-bit shift and rotate circuit. For double word sized (32-bit) operands, the variously sized shift and rotate circuits may be selectively enabled to perform between 1-bit and 31-bit shift/rotate/pass operations. For byte sized operands, the 8-bit and 16-bit shift and rotate circuits are used to pre-process the operands while the 1-bit, 2-bit and 4-bit shift and rotate circuits are selectively enabled to perform the full range, i.e., 1-bit to 7-bit, of possible shift/rotate operations. For word sized (16-bit) operands, the 16-bit or 8-bit and 16-bit shift and rotate circuits are used to pre-process the operands while the 1-bit, 2-bit and 4-bit shift and rotate circuits are selectively enabled to perform the full range of shift/rotate operations.

REFERENCES:
patent: Re33664 (1991-08-01), Kang et al.
patent: 4495598 (1985-01-01), Vahlstrom et al.
patent: 4583197 (1986-04-01), Chappell et al.
patent: 5379240 (1995-01-01), Byrne
patent: 5781457 (1998-07-01), Cohen et al.

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