Microprocessor having cache bypass signal terminal

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395400, 364DIG1, G06F 1200, G06F 1208, G06F 1314, G06F 1324

Patent

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052476391

ABSTRACT:
A microprocessor capable of being incorporated in an information processing system with a cache memory unit and capable of realizing fine cache bypass control. The microprocessor can detect data to be cache-bypassed without checking bus status signals. The microprocessor is equipped with a cache bypass signal generator. Upon detection of data to be bypassed, the cache bypass signal generator generates a cache bypass request signal, which prevents the cache memory from performing a data caching operation on the data.

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IBM Technical Disclosure Bulletin, vol. 25, No. 38, Aut. 1, 1982, pp. 1656-1657--Duke et al.

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