Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements
Reexamination Certificate
1997-06-03
2001-04-03
Kinkead, Arnold (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Afc with logic elements
C331S017000, C375S376000, C327S159000, C713S400000
Reexamination Certificate
active
06211739
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to oscillators generally and, more particularly, to a digitally controlled oscillator for establishing frequency and/or phase locking with an external periodic signal.
BACKGROUND OF THE INVENTION
Modern microprocessor and peripheral devices are often dependant on synchronization of various timing signals. One such standard used in peripheral devices is the Universal Serial Bus (USB), which has a variety of operating modes that allow a number of computer peripherals to be connected to a generic port. Implementation of a universal serial bus device involves a variety of design considerations including synchronizing data. Conventional USB designs may implement a phase lock loop (PLL) for synchronizing timing relationships. However, a PLL is generally complex and may require a relatively large area to implement or use components not shared with other circuits. A PLL is typically a reactive device and generally relies on feedback to synchronize incoming data. The feedback mechanism typically limits design adjustment capabilities. Without an additional voltage controlled oscillator, a PLL is limited to providing phase adjustments, rather than frequency adjustments.
A digitally controlled oscillator (DCO) is a conventional circuit for generating specific frequencies. A DCO may have a fine input F and a coarse input C (see e.g., DCO
30
in
FIG. 2
) which may be used to provide a variety of frequency adjustments based on external signals received at the inputs. The coarse frequency input generally controls the general range of the frequency, while the fine input F is used for more precise control. While DCOs are useful for generating an output frequency in response to the fine and coarse inputs, it is desirable to provide a system that provides a stable DCO to an output that is synchronized with respect to an external periodic signal.
SUMMARY OF THE INVENTION
The present invention concerns a circuit comprising an oscillator configured to provide a first output signal in response to one or more input signals. A divider circuit may be configured to receive the first output signal of the oscillator circuit and to present a signal having a second frequency at a second output. A frequency comparator circuit may receive (i) the second output signal and (ii) an external signal having a third frequency, and may present in response thereto a third output signal representing or containing control information. A processor circuit may be coupled to the oscillator circuit and the comparator circuit, and optionally to the divider circuit. The processor circuit may be configured to control the frequency of oscillation of the first output signal.
The objects, features and advantages of the present invention include providing a digitally controlled oscillator that may (1) establish frequency and/or phase locking relationships with an external periodic signal, (2) consume less real estate, chip area or circuit board area than a conventional PLL, and/or (3) share components with one or more other circuits (such as a microprocessor or microcontroller).
REFERENCES:
patent: 4855683 (1989-08-01), Troudet et al.
patent: 5381116 (1995-01-01), Nuckolls et al.
patent: 5420543 (1995-05-01), Lundberg et al.
patent: 5446867 (1995-08-01), Young et al.
patent: 5473285 (1995-12-01), Nuckolls et al.
patent: 5495205 (1996-02-01), Parker et al.
patent: 5506875 (1996-04-01), Nuckolls et al.
patent: 5511100 (1996-04-01), Lundberg et al.
patent: 5565819 (1996-10-01), Cooper
patent: 5670915 (1997-09-01), Cooper et al.
patent: 5673004 (1997-09-01), Park
patent: 5675813 (1997-10-01), Holmdahl
patent: 5796312 (1998-08-01), Hull et al.
patent: 5805909 (1998-09-01), Diewald
patent: 9736230 (1997-10-01), None
Universal Serial Bus Specification, Jan. 15, 1996, pp. 111-143.
Jaccard Fred
Synder Warren S.
Christopher P. Maiorana P.C.
Cypress Semiconductor Corp.
Kinkead Arnold
LandOfFree
Microprocessor controlled frequency lock loop for use with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Microprocessor controlled frequency lock loop for use with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microprocessor controlled frequency lock loop for use with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2553767