Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Patent
1992-03-27
1994-04-26
Young, Brian K.
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
3642412, H03M 112
Patent
active
053070666
DESCRIPTION:
BRIEF SUMMARY
INDUSTRIAL FIELD
The present invention relates to a microcomputer with built-in converters, and more particularly relates to a microcomputer which prevents degradation of conversion accuracy due to noises, where the conversion is done on built-in type analog to digital converters (hereinafter referred to as "AD converters"), digital to analog converters (hereinafter referred to as "DA converters"), or a combination of these converters.
BACKGROUND OF THE INVENTION
One typical example of a conventional microcomputer is disclosed in Japanese Laid Open Publication No. 64-58043. Its configuration will be explained hereinafter referring to drawings. FIG. 2 is a block diagram of one example of the conventional microcomputer with built-in converters.
This microcomputer incorporates a central processing unit (hereinafter referred to as "CPU") 1 which is adapted for processing digital signals in response to instructions provided by a given program. An AD converter 2 is connected to this CPU 1 via a data bus DB and an address bus AB. The AD converter 2 converts each analog signal received at an analog input terminal 3 to a corresponding digital signal in accordance with a conversion initiation signal ST from the CPU 1. After the conversion, the AD converter 2, on one hand, passes the digital signal to the CPU 1 via the data bus DB and, on the other hand, generates an AD selection signal S2.
An edge detection circuit 4 is connected to the CPU 1 as well as to the AD converter 2. The edge detection circuit 4 detects the (conversion) state of the AD converter 2 in response to the AD selection signal S2 and provides a CPU stop signal SP or clear signal CLR to the CPU 1.
In the case of a microcomputer of this type, the CPU 1 passes, via the address bus AB, to the AD converter 2 each address which was sequentially given to the AD converter 2 by the given program. Thereupon, the AD converter 2 is selected and an AD selection signal S2 generated by the selected AD converter 2 will become active. In so doing, it shifts from "L" level to a "H" level. The edge detection circuit 4 detects a rise of the AD selection signal S2, i.e. from the "L" level to the "H" level and passes the CPU stop signal SP to the CPU 1 to interrupt of CPU operation.
On receipt of the CPU stop signal SP, the CPU 1 is put in a stop mode and concurrently passes the AD conversion initiation signal ST to the AD converter 2 to initiate its operation. As a result, the AD converter 2 converts an analog signal received at the analog input terminal 3 to a corresponding digital signal. After passage of a prescribed period, the AD selection signal S2 outputted from the AD converter 2 shifts from the "H" level to the "L" level. This shift in level is detected by the edge detection circuit 4 which in turn passes the clear signal CLR to the CPU 1 so that the CPU 1 restarts its operation.
As stated above, the conventional microcomputer is associated with the edge detection circuit 4 which detects the conversion carried out by the AD converter 2 so that, when the AD converter 2 is in operation, the edge detection circuit 4 outputs a CPU stop signal SP to halt major operations of the CPU 1. Consequently, generation of noises by the CPU 1 during the AD conversion process is reduced so as not to interfere with the accuracy of the AD converter 2 during these operations. However, the efficiency of microcomputer using this architecture is severely diminished because once the CPU 1 is put in a halt mode by the AD converter 2 (or alternatively a DA converter), the CPU 1 cannot perform any operations other than the AD conversion (or alternatively DA conversion) thereby causing a serious problem of low operation. When a microcomputer is provided with a halt mode for halting operation of the CPU itself, a similar procedure can be carried out by an appropriate program without use of the edge detection circuit 4.
It is the basic object of the present invention to provide a microcomputer with built-in converters which assures high accuracy in AD or DA conversion without increase
REFERENCES:
patent: 4996639 (1991-02-01), Ishimoto et al.
Burton et al. "Microprocessor Systems Handbook", 1977, pp. 157-161.
Abe Syunji
Kobayashi Jiro
Suwabe Satoru
Manzo Edward D.
OKI Electric Industry Co., Ltd.
Young Brian K.
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